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Compact Device Modeling Jobs (NOW HIRING)

Flexcompute

Agentic Photonic Design Engineer

GDSII, DRC, LVS, PDKs, schematic-driven design, and compact models. • Strong physics or ... Working knowledge of Maxwell's equations, waveguide theory, and semiconductor device physics. • ...

Ayar Labs

Sr. Engineer, Research Software

San Jose, CA · On-site

$143K - $189K/yr

... photonic device physics, circuits, signal processing, or statistical analysis. • Prior work on compact models, SPICE-like simulators, or link/yield statistical modeling. Company : Ayar Labs ...

Ayar Labs

Sr. Engineer, Research Software

San Jose, CA · On-site

$143K - $189K/yr

... photonic device physics, circuits, signal processing, or statistical analysis. • Prior work on compact models, SPICE-like simulators, or link/yield statistical modeling. Company : Ayar Labs ...

Spark Tek Inc

Machine Learning Engineer

San Jose, CA · On-site

... Compact model size ( Qualifications : Required : • Strong expertise in Machine Learning and ... Device identifiers (PID, Serial Number, MAC, Hostname), Smart / Virtual accounts, Orders, contracts ...

Terra Quantum

Lead Photonics Integrated Circuit Engineer

$104K - $138K/yr

Device & Process Integration * Lead the design, simulation, and characterisation of photonic ... Develop compact models and Verilog-A behavioural descriptions for photonic devices to enable system ...

RecruitWell

Cardiology - Noninvasive Physician

Vancouver, WA · On-site

$374K - $423K/yr

Option for 1-2 providers (alternating week or biweekly coverage models) Schedule: * Monday-Friday ... Device technicians EMR System: * Epic Requirements * Board Certified in Cardiology - Required

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Compact Device Modeling information

What are the key skills and qualifications needed to thrive as a compact device modeling engineer, and why are they important?

To thrive as a Compact Device Modeling Engineer, you need a strong background in semiconductor physics, device modeling, and typically an advanced degree in electrical engineering or a related field. Proficiency with simulation tools like SPICE, TCAD software, and programming languages such as Python or MATLAB, as well as knowledge of industry-standard modeling languages (e.g., Verilog-A), is essential. Strong analytical thinking, attention to detail, and effective communication skills help you collaborate with cross-functional teams and interpret complex data. These skills are crucial for developing accurate models that drive innovation and reliability in semiconductor device design.

What types of teams or departments does a compact device modeling engineer typically collaborate with?

Compact Device Modeling engineers often work closely with circuit design teams, process technology groups, and EDA (Electronic Design Automation) tool developers. Collaboration is essential because accurate device models are critical for reliable circuit simulations and successful chip fabrication. Regular communication with these departments ensures that the models reflect real-world device behavior and are compatible with evolving design requirements and manufacturing technologies. This cross-functional teamwork provides valuable exposure to multiple aspects of semiconductor development and can open doors for broader career growth.

What is compact device modeling?

Compact device modeling is the process of creating simplified mathematical models that accurately represent the electrical behavior of semiconductor devices, such as transistors, within electronic circuits. These models are essential for circuit simulation tools, enabling engineers to predict circuit performance without resorting to complex, time-consuming physical simulations. Compact models balance accuracy and computational efficiency, making them a cornerstone in the design and verification of integrated circuits.

What is the difference between Compact Device Modeling vs Semiconductor Device Engineer?

AspectCompact Device ModelingSemiconductor Device Engineer
CredentialsTypically requires engineering degree, specialized modeling certificationsRequires engineering degree, often with additional certifications in device physics
Work EnvironmentResearch labs, simulation centers, R&D departmentsDesign labs, manufacturing facilities, R&D teams
Industry UsageUsed for device simulation, circuit design, and performance predictionInvolved in device development, fabrication, and testing

Compact Device Modeling focuses on creating simplified models of semiconductor devices for simulation purposes, aiding circuit design. Semiconductor Device Engineers work on designing, developing, and testing actual semiconductor devices. While both roles require engineering expertise and involve semiconductor technology, modeling is more simulation-oriented, whereas engineering involves hands-on device development.

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Compact Device Modeling jobs near you
Infographic showing various Compact Device Modeling job openings in the United States as of August 2026, with employment types broken down into 86% Full Time, 11% Part Time, and 3% Contract. Highlights an 84% Physical, 4% Hybrid, and 12% Remote job distribution.

Sr. Engineer, Photonics Device Design

Ayar Labs

San Jose, CA • On-site

$170K - $220K/yr

Full-time

Re-posted 27 days ago

Job description

Sr. Engineer, Photonics Device Design
Location: San Jose (on-site)
Ayar Labs is transforming AI infrastructure with the industry's first proven co-packaged optics (CPO) solution, manufactured in partnership with the world's leading semiconductor ecosystem. Backed by industry leaders including NVIDIA, AMD, MediaTek and Intel, our technology moves data at the speed of light - faster, further, and with a fraction of the energy consumed by conventional electrical interconnect.
As a photonics design engineer at Ayar Labs, you'll work on the devices at the heart of our CPO solution - designing, simulating, and characterizing integrated photonic components for an aggressive optical I/O product roadmap. You'll contribute to real tape-outs, develop compact models from measurement data, and build tools and infrastructure the team depends on. Because our team is small and the problems are real, you'll develop faster here than almost anywhere else: your contributions land in product, not in a backlog.
Essential Functions
  • Design. Design integrated photonic components needed for an aggressive optical I/O product roadmap - passive devices (couplers, gratings, micro-ring resonators) and the system context that sets their requirements.
  • Characterize and iterate. Plan test vehicles, use measurement data to refine simulation models, and drive device performance toward roadmap targets.
  • Build infrastructure. Contribute to the team's design and analysis codebase - extend simulation automation, layout scripts, and data analysis tools that make the whole team faster.
  • Collaborate. Work with colleagues across packaging, laser, circuits, and firmware to understand system requirements and translate them into device specifications.
  • Support manufacturability. Work with foundry process data to assess design margins, contribute to design-for-manufacturability, and support yield improvement on new device designs.

Required Qualifications
  • B.S. or equivalent experience in Electrical Engineering, Optical Engineering, Physics, or related field; M.S. or PhD a plus
  • 2+ years of experience in silicon photonics or integrated photonic device design (research or commercial)
  • Solid understanding of photonic device physics: waveguides, couplers, gratings, micro-ring resonators
  • Experience with simulation tools for passive optical devices (e.g., FDTD, mode solvers)
  • Python skills; experience writing structured code in a team environment
  • Ability to connect simulation to measurement - design, characterize, and iterate on device performance

Preferred Qualifications
  • M.S. or PhD with integrated photonics focus
  • Experience contributing to PIC tape-outs on a standard silicon photonics platform (e.g., AIM Photonics, GlobalFoundries, imec, or similar)
  • Experience designing or characterizing electro-optic devices: micro-ring modulators, photodetectors
  • High-speed test experience: BERT, VNA, wafer-level characterization
  • Statistical analysis of device or process data; DOE methods
  • Familiarity with optical transceiver principles and co-packaged optics architectures
  • Demonstrated use of AI tools to achieve meaningful productivity gains in design or analysis workflows - e.g., device optimization, AI-assisted code development

Salary range: $170,000-$220,000
NOTE TO RECRUITERS:
Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don't send candidates to Ayar Labs, and do not contact our managers.
Ayar Labs is an Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.

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