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Compact Device Modeling Jobs in California (NOW HIRING)

Ayar Labs

Sr. Engineer, Research Software

San Jose, CA · On-site

$143K - $189K/yr

... photonic device physics, circuits, signal processing, or statistical analysis. • Prior work on compact models, SPICE-like simulators, or link/yield statistical modeling. Company : Ayar Labs ...

Ayar Labs

Sr. Engineer, Research Software

San Jose, CA · On-site

$143K - $189K/yr

... photonic device physics, circuits, signal processing, or statistical analysis. • Prior work on compact models, SPICE-like simulators, or link/yield statistical modeling. Company : Ayar Labs ...

Spark Tek Inc

Machine Learning Engineer

San Jose, CA · On-site

... Compact model size ( Qualifications : Required : • Strong expertise in Machine Learning and ... Device identifiers (PID, Serial Number, MAC, Hostname), Smart / Virtual accounts, Orders, contracts ...

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Compact Device Modeling information

What are the key skills and qualifications needed to thrive as a compact device modeling engineer, and why are they important?

To thrive as a Compact Device Modeling Engineer, you need a strong background in semiconductor physics, device modeling, and typically an advanced degree in electrical engineering or a related field. Proficiency with simulation tools like SPICE, TCAD software, and programming languages such as Python or MATLAB, as well as knowledge of industry-standard modeling languages (e.g., Verilog-A), is essential. Strong analytical thinking, attention to detail, and effective communication skills help you collaborate with cross-functional teams and interpret complex data. These skills are crucial for developing accurate models that drive innovation and reliability in semiconductor device design.

What types of teams or departments does a compact device modeling engineer typically collaborate with?

Compact Device Modeling engineers often work closely with circuit design teams, process technology groups, and EDA (Electronic Design Automation) tool developers. Collaboration is essential because accurate device models are critical for reliable circuit simulations and successful chip fabrication. Regular communication with these departments ensures that the models reflect real-world device behavior and are compatible with evolving design requirements and manufacturing technologies. This cross-functional teamwork provides valuable exposure to multiple aspects of semiconductor development and can open doors for broader career growth.

What is compact device modeling?

Compact device modeling is the process of creating simplified mathematical models that accurately represent the electrical behavior of semiconductor devices, such as transistors, within electronic circuits. These models are essential for circuit simulation tools, enabling engineers to predict circuit performance without resorting to complex, time-consuming physical simulations. Compact models balance accuracy and computational efficiency, making them a cornerstone in the design and verification of integrated circuits.

What is the difference between Compact Device Modeling vs Semiconductor Device Engineer?

AspectCompact Device ModelingSemiconductor Device Engineer
CredentialsTypically requires engineering degree, specialized modeling certificationsRequires engineering degree, often with additional certifications in device physics
Work EnvironmentResearch labs, simulation centers, R&D departmentsDesign labs, manufacturing facilities, R&D teams
Industry UsageUsed for device simulation, circuit design, and performance predictionInvolved in device development, fabrication, and testing

Compact Device Modeling focuses on creating simplified models of semiconductor devices for simulation purposes, aiding circuit design. Semiconductor Device Engineers work on designing, developing, and testing actual semiconductor devices. While both roles require engineering expertise and involve semiconductor technology, modeling is more simulation-oriented, whereas engineering involves hands-on device development.

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Compact Device Modeling jobs near you

Staff Semiconductor Device Modeling Engineer

Intel

Santa Clara, CA • Hybrid

$149K - $284K/yr

Full-time

Medical, Retirement, PTO

Posted yesterday

New

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers

Job description

Job Details:Job Description: 

The Role and Impact
As a Staff Device Modeling Engineer, you will play a pivotal role in advancing circuit simulation and modeling capabilities for next-generation semiconductor technologies. Your daily responsibilities will include collaborating with cross-functional teams to drive the development of high-quality simulation tools and methodologies, ensuring alignment with technology roadmaps, and enabling optimized solutions for process design kits (PDKs). Your contributions will directly impact accelerating product delivery timelines and enhancing Intel's leadership in the foundry space.
Business Group
You will be joining Intel's Design Technology Platform (DTP) organization, a critical pillar that empowers Intel Foundry customers to produce cutting-edge products for the marketplace. The Compact Device Modeling Group (CDMG), within DTP, focuses on co-optimizing Intel's state-of-the-art process technology and design tools to enable the development of innovative, high-performance products. As part of this team, you will contribute to the modeling solutions that allow design teams to deliver leadership products for data-centric applications faster and with greater precision.
Key Responsibilities

  • Partner with technology leaders and PDK teams to ensure modeling capabilities align with roadmap requirements.
  • Drive readiness and validation of simulation and modeling solutions to meet PDK delivery milestones.
  • Develop compact device models (e.g., FinFET, GAA) for transistor modeling, including layout-dependent effects and circuit performance impacts.
  • Conduct statistical modeling, simulation, and data analysis using Python scripting and other relevant tools.
  • Implement innovative methodologies for device targeting benchmarking circuits, self-heating effects, and Open Model Interface (OMI) modeling.
  • Collaborate across multiple teams and geographies to achieve seamless integration and optimized solutions.
Qualifications:
  • Bachelor's degree in Electrical Engineering or a related discipline with 6+ years of industry experience in the semiconductor field; -OR- Master's degree in Electrical Engineering or a related discipline with 4+ years of relevant industry experience; -OR- Ph.D. in Electrical Engineering or a related discipline with 2+ years of experience.
  • 2+ years of hands-on experience with compact modeling techniques for advanced nodes such as FinFET and GAAFET.
  • Proficiency with commercial simulators (e.g., HSPICE, Spectre) and extraction tools (e.g., ICCAP, MBP).
  • Experience in Python scripting for data analysis and automation.
  • Experience in statistical modeling, RF simulation, and EM simulation.

Preferred Qualifications

  • Ph.D. in Electrical Engineering or a related discipline with 3+ years of industry experience in the semiconductor field.
  • Strong background in Device physics and RF modeling.
  • Experience in RF structure design, RF De-embedding and EM simulation.
  • Experience collaborating across teams and geographies, with experience leading technical initiatives.
  • Experience with machine learning algorithms and their application in compact model development.
  • Strong understanding of process flows, circuit design, and simulation methodologies.

Join us in shaping the future of semiconductor technology innovation. Take the next step in your career by applying today and becoming part of a team dedicated to driving impactful solutions for Intel Foundry customers worldwide.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, Santa ClaraPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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