... chip devices (SoC), for spacecraft and payload applications. * You will lead design for excellence methods and processes utilizing the latest tools and industry standards. You will lead day to day ...
... chip devices (SoC), for spacecraft and payload applications. * You will lead design for excellence methods and processes utilizing the latest tools and industry standards. You will lead day to day ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Creates design documentation including Software Requirements Documents, block diagrams, Software ... Must have strong understanding of embedded hardware devices, chip-to-chip interfaces, and ...
Design chip and wire components for use in receivers, high-power limiters, and transmitters. * Test and document designs in preparation for potential production. * Complete understanding and wide ...
New
Design chip and wire components for use in receivers, high-power limiters, and transmitters. * Test and document designs in preparation for potential production. * Complete understanding and wide ...
New
ASIC Packaging Signal Integrity Hardware Engineering Technical Lead (Remote)
Colorado Springs, CO · On-site +1
Lead or participate in chip architecture discussions and the definition, architecture, and design of high-performance ASICs, including reviews of intricate IC and analog/mixed-signal circuit designs.
ASIC Packaging Signal Integrity Hardware Engineering Technical Lead (Remote)
Colorado Springs, CO · On-site +1
Lead or participate in chip architecture discussions and the definition, architecture, and design of high-performance ASICs, including reviews of intricate IC and analog/mixed-signal circuit designs.
Marketing Programs Manager - 3D IC Design & Advanced Packaging Solutions - Siemens EDA
Boulder, CO · On-site
Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. We are seeking a visionary ...
Marketing Programs Manager - 3D IC Design & Advanced Packaging Solutions - Siemens EDA
Boulder, CO · On-site
Our customers use our tools to push the boundaries of technology and physics to deliver better products in the increasingly complex world of chip, board, and system design. We are seeking a visionary ...
Advanced Package Technology Engineer
$120K - $192K/yr
... silicon & package design, marketing, NPI, assembly/substrate suppliers & customers and is ... chip packaging solution with advanced multi-layer ceramic / organic substrates & Interposers;
Advanced Package Technology Engineer
$120K - $192K/yr
... silicon & package design, marketing, NPI, assembly/substrate suppliers & customers and is ... chip packaging solution with advanced multi-layer ceramic / organic substrates & Interposers;
Advanced Package Technology Engineer
Fort Collins, CO · On-site
$120K - $192K/yr
... silicon & package design, marketing, NPI, assembly/substrate suppliers & customers and is ... chip packaging solution with advanced multi-layer ceramic / organic substrates & Interposers;
Advanced Package Technology Engineer
Fort Collins, CO · On-site
$120K - $192K/yr
... silicon & package design, marketing, NPI, assembly/substrate suppliers & customers and is ... chip packaging solution with advanced multi-layer ceramic / organic substrates & Interposers;
ASIC/FPGA Engineer V with Security Clearance
Denver, CO · On-site
$167K - $289K/yr
... chip architecture development supporting new aerospace and defense programs • Prepare status ... design, debug, and/or verification of ASICs and/or FPGAs • Ability and willingness to obtain and ...
ASIC/FPGA Engineer V with Security Clearance
Denver, CO · On-site
$167K - $289K/yr
... chip architecture development supporting new aerospace and defense programs • Prepare status ... design, debug, and/or verification of ASICs and/or FPGAs • Ability and willingness to obtain and ...
Design and implement test fixtures including test plans for both chip-level and board level environments and create reusable circuits that can be utilized across multiple projects. * Maintain a ...
Design and implement test fixtures including test plans for both chip-level and board level environments and create reusable circuits that can be utilized across multiple projects. * Maintain a ...
CPU Cache Architect
Fort Collins, CO · On-site
$175K/yr
We are looking for a Fellow-level experienced design engineer to join this innovative team as a ... We are pushing the envelope on chip performance, so the status quo must be challenged on every ...
CPU Cache Architect
Fort Collins, CO · On-site
$175K/yr
We are looking for a Fellow-level experienced design engineer to join this innovative team as a ... We are pushing the envelope on chip performance, so the status quo must be challenged on every ...
Principal Senior Engineer - FPGA Design - $20K Sign On Bonus with Security Clearance
$132K - $226K/yr
Design and implement test fixtures including test plans for both chip-level and board level environments and create reusable circuits that can be utilized across multiple projects. * Maintain a ...
Principal Senior Engineer - FPGA Design - $20K Sign On Bonus with Security Clearance
$132K - $226K/yr
Design and implement test fixtures including test plans for both chip-level and board level environments and create reusable circuits that can be utilized across multiple projects. * Maintain a ...
ASIC DFT Engineer
$108K - $172K/yr
Candidate's primary responsibilities will be ATPG & Verification at chip level, Rapid bring-up at ATE and RMA support * Working closely with STA and DI Engineers design closure for test * Generating ...
ASIC DFT Engineer
$108K - $172K/yr
Candidate's primary responsibilities will be ATPG & Verification at chip level, Rapid bring-up at ATE and RMA support * Working closely with STA and DI Engineers design closure for test * Generating ...
ASIC DFT Engineer
Fort Collins, CO · On-site
$108K - $172K/yr
Candidate's primary responsibilities will be ATPG & Verification at chip level, Rapid bring-up at ATE and RMA support * Working closely with STA and DI Engineers design closure for test * Generating ...
ASIC DFT Engineer
Fort Collins, CO · On-site
$108K - $172K/yr
Candidate's primary responsibilities will be ATPG & Verification at chip level, Rapid bring-up at ATE and RMA support * Working closely with STA and DI Engineers design closure for test * Generating ...
FPGA Product Application Engineer
Longmont, CO · On-site
$100K/yr
... SoCs (System on a Chip), and ACAPs (Adaptive Compute Acceleration Platform) as well as the ... Advise customers on design techniques and the implementation of alternative solutions * Develop ...
FPGA Product Application Engineer
Longmont, CO · On-site
$100K/yr
... SoCs (System on a Chip), and ACAPs (Adaptive Compute Acceleration Platform) as well as the ... Advise customers on design techniques and the implementation of alternative solutions * Develop ...
... SoCs (System on a Chip), and ACAPs (Adaptive Compute Acceleration Platform) as well as the ... Advise customers on design techniques and the implementation of alternative solutions * Develop ...
... SoCs (System on a Chip), and ACAPs (Adaptive Compute Acceleration Platform) as well as the ... Advise customers on design techniques and the implementation of alternative solutions * Develop ...
Optics Test Engineer
Colorado Springs, CO · On-site
Create, conduct, & analyze Design of Experiments (DOE) for development and production activities ... chip-to-chip, board-to-board, on-board and system-to-system connectivity. Optical products are ...
Optics Test Engineer
Colorado Springs, CO · On-site
Create, conduct, & analyze Design of Experiments (DOE) for development and production activities ... chip-to-chip, board-to-board, on-board and system-to-system connectivity. Optical products are ...
Create, conduct, & analyze Design of Experiments (DOE) for development and production activities ... chip-to-chip, board-to-board, on-board and system-to-system connectivity. Optical products are ...
Quick apply
Create, conduct, & analyze Design of Experiments (DOE) for development and production activities ... chip-to-chip, board-to-board, on-board and system-to-system connectivity. Optical products are ...
Chip Design information
See Colorado salary details
$44.2K - $59.4K
4% of jobs
$59.4K - $74.7K
8% of jobs
$85.9K is the 25th percentile. Wages below this are outliers.
$74.7K - $89.9K
17% of jobs
The median wage is $104.1K / yr.
$89.9K - $105.2K
22% of jobs
$105.2K - $120.4K
15% of jobs
$120.4K - $135.6K
6% of jobs
$140.5K is the 75th percentile. Wages above this are outliers.
$135.6K - $150.9K
7% of jobs
$150.9K - $166.1K
7% of jobs
$166.1K - $181.4K
8% of jobs
$181.4K - $196.6K
2% of jobs
$196.6K - $211.9K
2% of jobs
$44.2K
$120.4K
$211.9K
How much do chip design jobs pay per year?
Is chip design in demand?
What are the key skills and qualifications needed to thrive in the Chip Design position, and why are they important?
To excel in Chip Design, a strong background in electrical engineering, digital and analog circuit design, and semiconductor physics is typically required, often supported by a relevant engineering degree. Familiarity with electronic design automation (EDA) tools like Cadence, Synopsys, and Mentor Graphics, as well as proficiency in hardware description languages (HDLs) such as Verilog or VHDL, are standard prerequisites. Outstanding problem-solving skills, attention to detail, and the ability to collaborate closely with cross-functional teams set candidates apart. These competencies are essential for designing efficient, reliable integrated circuits and meeting the evolving needs of the semiconductor industry.
What are the typical career progression opportunities in a Chip Design role?
Chip Design offers a clear pathway for career growth, starting from entry-level positions such as Design Engineer or Verification Engineer and progressing to roles like Lead Designer, Project Manager, or Technical Architect. As you gain experience and demonstrate expertise, opportunities often open up in specialized areas such as physical design, timing analysis, or system architecture. Many professionals also advance to leadership or managerial positions, overseeing teams or entire design projects. Additionally, working in such a fast-evolving field keeps you engaged with the latest technologies and can provide options to transition into adjacent areas like product management or application engineering.
What is a Chip Design job?
A Chip Design job involves creating and developing semiconductor circuits used in electronic devices. Engineers in this field work on designing, verifying, and testing integrated circuits (ICs) to ensure performance, power efficiency, and reliability. They use specialized software tools for designing hardware and optimizing functionality. Chip designers collaborate with cross-functional teams to bring new processors, memory chips, or custom ASICs from concept to production. This role is crucial in industries like computing, telecommunications, and consumer electronics.
What engineers make $500,000?
How much do chip designers make?
How much do microchip designers make?

Full-time
Medical, Life, Retirement, PTO
Posted 20 days ago
Job description
Overview
Principal Flight Software Architect serves in the Orion Space Systems principal engineer office, reporting directly to the Senior Director of Engineering. This crucial role is responsible for all aspects of software design excellence at Orion Space Systems, on complex spacecraft and payload products.
Key Responsibilities
- Architecture development of complex flight and ground software designs for all missions and products. You will have architecture responsibility and technical authority required.
- Development of complex applications and algorithms for embedded processing systems utilizing latest processing architectures: micro-controllers, processors, graphic processing units (GPU) and system-on-chip devices (SoC), for spacecraft and payload applications.
- You will lead design for excellence methods and processes utilizing the latest tools and industry standards. You will lead day to day architecture and code development, design artifact development, code reviews and code. management. You will work with the senior director to develop design assurance methods and processes, while balancing technical excellence, cost and schedule targets.
- You will lead internal and external design reviews ensuring technical, team and design artifact excellence. You will lead and present complex technical topics to the diverse customer community.
Qualifications
Qualifications
Required
- Bachelor's degree or higher in a relevant engineering or computation field plus 16-18 years, MS plus 14+ years, or PhD plus 10+ years of professional experience in software engineering development positions for high-reliability space and aerospace applications.
- Extensive experience with space processing architecture encompassing micro-controllers, processors, system-on-chip and graphic processing unit devices.
- Deep knowledge of embedded systems, operating systems, RTOS and programming languages (C/C++).
- Experience supporting programs and products through all phases of development - from requirements derivation and development to sustainment.
Preferred
- Experience developing and implementing architectures for variety of customers: DoW (national defense), NASA (civil space) and commercial customers.
Equal Pay Act
This is the projected compensation range for this position. There are differentiating factors that can impact a final salary/hourly rate, including, but not limited to, Contract Wage Determination, relevant work experience, skills and competencies that align to the specified role, geographic location (For Remote Opportunities), education and certifications as well as Federal Government Contract Labor categories. In addition, Arcfield invests in its employees beyond just compensation. Arcfield 's benefits offerings include, dependent upon position, Health Insurance, Life Insurance, Paid Time Off, Holiday Pay, Short Term and Long-Term Disability, Retirement and Savings, Learning and Development opportunities, wellness programs as well as other optional benefit elections. Min: $152,624.06 Max: $265,383.63
EEO Statement
We are an equal opportunity employer and federal government contractor. We do not discriminate against any employee or applicant for employment as protected by law.
About Arcfield
Sourced by ZipRecruiter
Industry
It services
Company size
1,001 - 5,000 Employees
Headquarters location
Chantilly, VA, US
Year founded
2021