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Asic Development Engineer Jobs in Minnesota (NOW HIRING)

ASIC Design Verification Engineer

Minneapolis, MN · On-site

$142K - $173K/yr

Typical tasks include: development of new simulation environments, execution of verification plans ... ASIC/FPGA design verification experience with UVM methodologies. * Develop and maintain UVMbased ...

Sr. Design Verification Engineer

Minneapolis, MN · On-site

$142K - $173K/yr

Our ASIC Design Verification team develops robust, scalable verification environments for highly ... Exposure to microcode, assembly language, or firmware development * Proven analytical, debugging ...

Showing results 21-40

Asic Development Engineer information

What is the difference between Asic Development Engineer vs FPGA Design Engineer?

AspectAsic Development EngineerFPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools
Work EnvironmentDesigning and verifying custom silicon chips in semiconductor labs or R&D centersDeveloping and testing FPGA-based solutions in hardware labs or embedded systems environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and tech giantsCommon in telecommunications, aerospace, and embedded systems industries

While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.

Are ASIC Development Engineers in demand?

ASIC Development Engineers are in high demand due to the growing need for custom hardware solutions in industries like telecommunications, consumer electronics, and automotive. Skilled engineers with knowledge of hardware description languages such as VHDL or Verilog, along with experience in FPGA and ASIC design, are particularly sought after in the technology sector.

How much do ASIC development engineers make?

ASIC development engineers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $150,000.

What does an ASIC development engineer do?

An ASIC development engineer designs, develops, and tests application-specific integrated circuits (ASICs) used in electronic devices. They work with hardware description languages like VHDL or Verilog, collaborate with cross-functional teams, and use CAD tools to create efficient chip architectures that meet performance and power specifications.

What are popular job titles related to Asic Development Engineer jobs in Minnesota?

For Asic Development Engineer jobs in Minnesota, the most frequently searched job titles are:

What job categories do people searching Asic Development Engineer jobs in Minnesota look for?

The top searched job categories for Asic Development Engineer jobs in Minnesota are:

What cities in Minnesota are hiring for Asic Development Engineer jobs?

Cities in Minnesota with the most Asic Development Engineer job openings:

Infographic showing various Asic Development Engineer job openings in Minnesota as of August 2026, with employment types broken down into 1% As Needed, 81% Full Time, 14% Part Time, 3% Contract, and 1% Nights. Highlights an 89% Physical, 3% Hybrid, and 8% Remote job distribution.

Fulltime position for Physical Design Engineer (ASIC) Location: Minneapolis, MN (Onsite)

Veah Consulting Services

Minneapolis, MN • On-site

$130K - $150K/yr

Full-time

Re-posted 17 days ago


Job description

Position: Physical Design Engineer (ASIC) 

Location: Minneapolis, MN (Onsite)

Duration: Fulltime/Permanent

Job Description:

Physical Semiconductor Design Engineer:  support development of digital, analog, mixed signal and high bandwidth communication circuits and products for aerospace, military and high temperature applications. Relevant circuits include ASIC library cells such as logic, registers, and I/O cells; memories; op amp, ADC, DAC, PLL, SERDES and DDR circuits and supporting digital functions.
KEY RESPONSIBILITIES
•            Lead efforts to translate customer designs into ASIC technology (RTL to GDSII)
•            Execute and address Floor-planning, Power grid design and deployment, achieve timing closure complying to timing constraints, harmonize DFT-insertion needs with physical design needs, configure for and pass physical verification requirements
•            Present and participate in project phase gate reviews
•            Prepare Documentation
Tools We Use:
•            Synopsys Design Compiler
•            Synopsys PrimeTime
•            Synopsys DFT Compiler
•            Synopsys IC Compiler2
•            Synopsys TetraMAX
•            Tessent MemoryBIST
•            Ansys Redhawk
•            Synopsys IC Validator
•            Siemens Calibre
•            Experience with digital IC design flow integration using Synopsys, Siemens and Ansys tools
•            Strong scripting language skills – e.g., Perl, Shell, TCL, C
•            Experience with Siemens Physical Verification tools and methods
•            Strong technical problem-solving skills
•            Windows OS and LINUX OS and Microsoft office suite tools proficiency
•            Effective and clear communication skills and good ability to work with others
•            Work accurately with excellent attention to detail
•            Radiation effects analysis knowledge/experience
•            Advanced node and SOI CMOS technology design experience