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Asic Design Verification Engineer Internship Jobs in Arizona

Raytheon

Senior FPGA Design Engineer

Tucson, AZ

$116K - $160K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

Raytheon

Senior FPGA Design Engineer

Tucson, AZ

$116K - $160K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

Raytheon

Senior FPGA Design Engineer

Phoenix, AZ

$122K - $168K/yr

As a Senior FPGA Design Engineer you will develop FPGA designs for all major vendors and device ... FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification using ...

Prattwhitney

Senior FPGA Design Engineer

Tucson, AZ · On-site

$86.80 - $165.20/hr

Lead small teams and mentor junior engineers. * Support internal and external technical reviews ... Experience with FPGA/ASIC design, including VHDL and/or Verilog coding or FPGA/ASIC verification ...

VertuCom

FPGA Engineer with Security Clearance

Tucson, AZ · On-site

$105K - $145K/yr

FPGA Engineer Develop FPGA designs including: Xilinx, Altera, and Microsemi. Designs are ... design (VHDL coding) or FPGA/ASIC verification (SystemVerilog coding with UVM) • Xilinx or ...

Intel

Physical Verification Engineer

Phoenix, AZ · On-site

$135K/yr

Drive quality improvements in design kits and documentation to remove barriers to successful ... Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom ...

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Asic Design Verification Engineer Internship information

What does an ASIC design verification engineer intern do?

An ASIC Design Verification Engineer Intern assists with testing and validating the functionality of Application-Specific Integrated Circuits (ASICs) during the hardware development process. Their responsibilities typically include writing test benches, developing verification environments, running simulations, and identifying bugs or design flaws before fabrication. Interns often use hardware description languages like Verilog or VHDL and verification methodologies such as UVM. This role is essential to ensure that the final ASIC design meets the required specifications and functions correctly.

What are the key skills and qualifications needed to thrive as an ASIC design verification engineer intern?

To thrive as an ASIC Design Verification Engineer Intern, you typically need a solid background in digital logic design, hardware description languages (HDLs) like Verilog or VHDL, and coursework in computer engineering or electrical engineering. Familiarity with simulation tools (such as ModelSim or Synopsys VCS), scripting languages like Python or Perl, and version control systems is highly valued. Strong analytical thinking, problem-solving abilities, and effective teamwork skills set exceptional candidates apart. These competencies are crucial for ensuring the functionality, reliability, and timely delivery of complex integrated circuits.

What are some typical challenges faced during an ASIC design verification engineer internship, and how can interns effectively address them?

Interns in ASIC design verification often encounter challenges such as understanding complex hardware specifications, learning new verification tools and methodologies, and debugging intricate design issues. To overcome these, it's important to proactively seek guidance from senior engineers, utilize available documentation and training resources, and actively participate in team meetings. Building strong communication skills and staying organized with test plans and bug tracking can also make the workflow smoother and more manageable.

What is the difference between Asic Design Verification Engineer Internship vs Asic Design Engineer?

AspectAsic Design Verification Engineer InternshipAsic Design Engineer
CredentialsTypically pursuing or recent graduate in Electrical Engineering or Computer EngineeringBachelor's or Master's degree in Electrical Engineering or related field
Work EnvironmentInternship program, often in a corporate R&D or design teamFull-time professional role in ASIC design teams
ResponsibilitiesAssisting in verification testbenches, running simulations, learning verification toolsDesigning, implementing, and testing ASIC hardware components
DurationUsually 3-6 monthsFull-time ongoing role

The Asic Design Verification Engineer Internship is an entry-level, temporary position focused on assisting verification tasks, while the Asic Design Engineer role involves full responsibility for ASIC design and development. Internships provide hands-on experience, whereas full engineers lead projects and make design decisions.

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What job categories do people searching Asic Design Verification Engineer Internship jobs in Arizona look for? The top searched job categories for Asic Design Verification Engineer Internship jobs in Arizona are:
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Infographic showing various Asic Design Verification Engineer Internship job openings in Arizona as of August 2026, with employment types broken down into 94% Full Time, and 6% Contract. Highlights an 88% In-person, and 12% Hybrid job distribution.

Staff Design Verification Engineer (AI/ML)

Analog Devices

Chandler, AZ • On-site

$133K - $163K/yr

Full-time

Re-posted 1 hour ago

Analog Devices rating

8.5

Company rating: 8.5 out of 10

Based on 17 frontline employees who took The Breakroom Quiz

33rd of 156 rated electronics manufacturers

Job description

About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.
About the Role
As a Staff Design Verification Engineer, you will develop and execute verification strategies for complex analog and mixed-signal ICs, from test planning through coverage closure. You will apply AI/ML techniques to improve regression efficiency, debug throughput, and coverage analysis. Your work will contribute to product quality and delivery across multiple business units, ensuring ADI's next-generation mixed-signal and power management products meet rigorous quality standards.
Key Responsibilities
  • Apply AI/ML methodologies for failure clustering, regression triage, anomaly detection, and coverage optimization
  • Develop and execute verification plans, defining coverage models and success metrics for mixed-signal IC blocks and subsystems
  • Build and maintain SystemVerilog/UVM testbenches, monitors, scoreboards, and automated checkers for mixed-signal verification
  • Perform functional coverage analysis and drive coverage closure toward tape-out readiness
  • Support silicon correlation by comparing simulation expectations against lab measurements and refining tests based on results
  • Participate in verification reviews, contributing technical analysis on coverage completeness and methodology improvements
  • Collaborate with design, applications, and test teams to ensure verification reflects real use-cases and operating conditions
Required Skills and Experience
  • MSEE or MSCE with 7+ years of IC verification experience, or PhD with 5+ years (BSEE/BSCE with equivalent depth considered)
  • Strong proficiency in SystemVerilog and UVM with experience building coverage-driven verification environments for mixed-signal products
  • Demonstrated ability to deliver verification through tape-out sign-off and production release
  • Solid Python scripting skills with experience applying AI/ML techniques to enhance verification productivity
  • Knowledge of formal verification, assertion-based methodology, and clock domain crossing analysis
  • Proficiency with Cadence verification tools: Xcelium (simulation), JasperGold (formal verification)
  • Excellent presentation, technical writing, and communication skills
Preferred Qualifications
  • Curiosity and initiative to explore AI/ML techniques and emerging tools that can transform verification workflows, with an enthusiasm for discovering more effective ways of working
  • Experience with mixed-signal and AMS verification techniques including Verilog-AMS, real-number modeling, and behavioral abstraction
  • Experience with gate-level simulation, SDF back-annotation, and post-layout verification
  • Strong analytical and problem-solving abilities
  • Ability to work effectively in a collaborative team environment
Technical Scope
  • Application of AI/ML-driven workflows for regression analytics, failure classification, and debug acceleration
  • Block-level and subsystem-level verification ownership from specification analysis through coverage closure
  • Mixed-signal verification environment development including analog behavioral modeling and digital-analog interface checking
  • Test plan authoring, coverage model implementation, and regression management
Collaboration and Impact
  • Share AI/ML-driven improvements to verification workflows and best practices with team members
  • Work with design, applications, and test teams to translate product requirements into verification coverage that reflects real operating conditions
  • Contribute to verification reviews and cross-team technical discussions

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: Experienced
Required Travel: No
Shift Type: 1st Shift/Days

What Analog Devices employees say

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Hours and flexibility

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About Analog Devices

Sourced by ZipRecruiter

Analog Devices (NASDAQ: ADI) designs and manufactures semiconductor products and solutions. We enable our customers to interpret the world around us by intelligently bridging the physical and digital worlds with unmatched technologies that sense, measure and connect.

Industry

Electrical equipment, appliance, and component manufacturing

Company size

5,001 - 10,000 Employees

Headquarters location

Norwood, MA, US

Year founded

1965

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