ZipRecruiter

Log In

1

Asic Design Internship Jobs (NOW HIRING)

Etched

DFT Intern

San Jose, CA · On-site

$17.50 - $23.50/hr

Exposure to ASIC or SoC design concepts * Familiarity with digital logic design fundamentals ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...

Intel

Memory Circuit Design Engineer

Phoenix, AZ

... internships or full-time employment. * Design technology co-optimization (DTCO). * Post-Si validation experience. * Knowledge of the CMOS ASIC design flow. Job Type:Experienced Hire Shift:Shift 1 ...

Intel

Memory Circuit Design Engineer

Santa Clara, CA

... internships or full-time employment. * Design technology co-optimization (DTCO). * Post-Si validation experience. * Knowledge of the CMOS ASIC design flow. Job Type:Experienced Hire Shift:Shift 1 ...

Intel

Memory Circuit Design Engineer

Hillsboro, OR

... internships or full-time employment. * Design technology co-optimization (DTCO). * Post-Si validation experience. * Knowledge of the CMOS ASIC design flow. Job Type:Experienced Hire Shift:Shift 1 ...

Intel

Memory Circuit Design Engineer

Austin, TX

... internships or full-time employment. * Design technology co-optimization (DTCO). * Post-Si validation experience. * Knowledge of the CMOS ASIC design flow. Job Type:Experienced Hire Shift:Shift 1 ...

Marvell

ASIC Architect

Santa Clara, CA

You will collaborate with all the technical teams (Design, Verification, Physical Design, Systems ... every stage - from internship to retirement and through life's most important moments. Our ...

Marvell

ASIC Architect

Santa Clara, CA

You will collaborate with all the technical teams (Design, Verification, Physical Design, Systems ... every stage - from internship to retirement and through life's most important moments. Our ...

Next Step Systems

FPGA Engineer

Linthicum, MD · On-site

$128K - $164K/yr

... partition design within ASIC/FPGA, create specification documents. - Develop RTL designs using ... and/or FPGAs (internship and research experience qualifies). - 2+ years of experience in ...

next page

Showing results 1-20

All JobsAsic Design JobsAsic Design Internship Jobs

Asic Design Internship information

See salary details

$9

$19

$36

How much do asic design internship jobs pay per hour?

As of Jul 19, 2026, the average hourly pay for asic design internship in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What is an ASIC Design Internship?

An ASIC Design Internship is a temporary position, usually for students or recent graduates, where individuals work with a team to help design, test, and verify application-specific integrated circuits (ASICs). Interns typically assist in various stages of the hardware design process, such as schematic capture, RTL coding, simulation, and debugging. This role provides hands-on experience with industry-standard tools and methodologies, and helps interns develop a deeper understanding of digital circuit design. The internship often serves as a stepping stone to a full-time career in hardware or semiconductor design.

What is the difference between Asic Design Internship vs Asic Design Engineer?

AspectAsic Design InternshipAsic Design Engineer
QualificationsTypically pursuing or recent graduate in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related field
Work EnvironmentInternship programs in semiconductor companies or design firms, often part-time or temporaryFull-time professional role in ASIC design teams within tech or semiconductor companies
ResponsibilitiesAssisting in design, simulation, and verification tasks under supervisionLeading ASIC design projects, implementing and testing complex circuits
Experience LevelEntry-level, learning-focusedMid-level to senior, with industry experience

The main difference between an Asic Design Internship and an Asic Design Engineer is the experience level and responsibilities. Internships are designed for students or recent graduates gaining foundational knowledge, while engineers are full-time professionals managing complex ASIC projects.

What are the key skills and qualifications needed to thrive as an ASIC Design Intern, and why are they important?

To thrive as an ASIC Design Intern, you need a solid understanding of digital logic design, computer architecture, and proficiency with hardware description languages such as Verilog or VHDL, typically gained through coursework in electrical or computer engineering. Familiarity with Electronic Design Automation (EDA) tools like Cadence or Synopsys, and simulation/debugging environments, is often expected. Attention to detail, strong problem-solving skills, and effective communication help interns excel in collaborative and fast-paced engineering teams. These skills and qualities are crucial for accurately designing, verifying, and implementing complex integrated circuits while contributing to successful project outcomes.

What types of projects and responsibilities can I expect during an ASIC Design Internship?

During an ASIC Design Internship, you’ll typically work on tasks such as digital circuit design, verification, and simulation using industry-standard tools like Verilog or VHDL. Interns often assist with block-level design, logic synthesis, and RTL (Register Transfer Level) coding, collaborating closely with experienced engineers. You may also participate in debugging sessions, run validation tests, and help document your design processes. This hands-on exposure helps you build a strong foundation in ASIC workflows, teamwork, and problem-solving within a fast-paced engineering environment.
What cities are hiring for Asic Design Internship jobs? Cities with the most Asic Design Internship job openings:
What are the most commonly searched types of Asic Design jobs? The most popular types of Asic Design jobs are:
What states have the most Asic Design Internship jobs? States with the most job openings for Asic Design Internship jobs include:
Asic Design Internship jobs near you

DFT Intern

Etched

San Jose, CA • On-site

$17.50 - $23.50/hr

Other

Re-posted 6 days ago

Job description

About Etched

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

As a DFT Intern at Etched, you will help review and refine DFT flow automation to support chip-level regression on Caelius. You will work across frontend and backend design teams, contribute to DFT verification (including MBIST, Scan, BSCAN, and SSN simulations), and develop flows for various ATPG fault models. You do not necessarily need prior DFT experience; just the ability to learn quickly in a fast-paced, high-autonomy environment. We are looking for Summer '26, Fall '26, Spring '27, and Summer '27 interns.

You may be a good fit if you have

  • Progress towards a Bachelor's, Master's, or PhD degree in electrical engineering, computer engineering, or a related field.

  • Familiarity with a hardware description language (Verilog or SystemVerilog)

  • Exposure to ASIC or SoC design concepts

  • Familiarity with digital logic design fundamentals

  • Familiarity with standard ASIC design flow steps (synthesis, STA, DFT)

  • Familiarity with scripting in Python, Tcl, or another language

  • Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with

  • Knowledge of DFT concepts such as MBIST, scan insertion, and scan compression

  • Experience with Tessent or similar DFT tooling

  • Familiarity with ATPG fault models (SAF, TDF, BDF, IDDQ, PDF)

  • Exposure to DFT flow automation or regression infrastructure

  • Familiarity with clocking and reset schemes

We encourage you to apply even if you do not believe you meet every single qualification.

Program details

  • 12-week paid internship

  • Generous housing support for those relocating

  • Daily lunch and dinner in our office

  • Based at our office in San Jose, CA

  • Direct mentorship from industry leaders and world-class engineers

  • Opportunity to work on one of the most important problems of our time

For any questions, contact internships@etched.com.

How we’re different

Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.

We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.