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Ai Chip Design Rtl Jobs in Austin, TX (NOW HIRING)

Mythic

Senior RTL Design Engineer

Austin, TX · On-site

$120K - $225K/yr

Mythic is building the future of AI computing with breakthrough analog technology that delivers ... Familiarity with network-on-chip (NoC) architectures. * Expertise in low-power design techniques ...

Mythic

Senior RTL Design Engineer

Austin, TX · On-site

$120K - $225K/yr

Mythic is building the future of AI computing with breakthrough analog technology that delivers 100 ... Familiarity with network-on-chip (NoC) architectures. * Expertise in low-power design techniques ...

Mythic

Senior RTL Design Engineer

Austin, TX

$120K - $225K/yr

Mythic is building the future of AI computing with breakthrough analog technology that delivers 100 ... Familiarity with network-on-chip (NoC) architectures. * Expertise in low-power design techniques ...

Nvidia

ASIC Design Engineer - Hardware

Austin, TX · Hybrid

Experience in RTL design (Verilog), verification (SystemVerilog), System-On-Chip design ... NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive ...

Apple

SoC Machine Learning Design Engineer

Austin, TX

$184K - $324K/yr

... our chip-design process. - You'll play a crucial role in developing generative AI and machine learning solutions for optimizations in RTL Design, Verification, and Power/Performance/Area efforts ...

Apple

SoC Machine Learning Design Engineer

Austin, TX

$184K - $324K/yr

... our chip-design process. - You'll play a crucial role in developing generative AI and machine learning solutions for optimizations in RTL Design, Verification, and Power/Performance/Area efforts ...

Etched

Design Verification Engineer - SoC

Austin, TX · On-site

$100 - $130/hr

About Etched Etched is building the world's first AI inference system purpose-built for ... You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate ...

New

Intel

SoC Logic Design Engineer

Austin, TX

$141K - $200K/yr

... on Chip (SoC) designs. In this role, you will focus on developing high-quality logic designs ... Develop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and ...

Apple

GenAI Physical Synthesis Engineer

Austin, TX

$150K - $277K/yr

... our RTL-to-GDS implementation flows. You will be directly responsible for creating AI-powered ... AI applications for EDA or chip design Minimum Qualifications Experience with GenAI frameworks ...

Apple

GenAI Physical Synthesis Engineer

Austin, TX

$150K - $277K/yr

... our RTL-to-GDS implementation flows. You will be directly responsible for creating AI-powered ... AI applications for EDA or chip design Minimum Qualifications Experience with GenAI frameworks ...

Intel Corporation

SoC Logic Design Engineer

Austin, TX · On-site

$141K - $200K/yr

... on Chip (SoC) designs. In this role, you will focus on developing high-quality logic designs ... Develop logic designs and RTL code for SoC blocks and subsystems aligned with architectural and ...

DensityAI

RTL Engineer

Austin, TX

$250K - $375K/yr

About the role Design the RTL that defines our AI accelerator. You'll architect and implement the digital blocks -- compute datapath, memory subsystem, on-chip interconnect, and control logic -- from ...

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Ai Chip Design Rtl information

See Austin, TX salary details

$79.8K

$138.1K

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How much do ai chip design rtl jobs pay per year?

As of Aug 7, 2026, the average yearly pay for ai chip design rtl in Austin, TX is $138,143.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,800.00 and $134,800.00 per year, depending on experience, location, and employer.

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Ai Chip Design Rtl jobs near you
Infographic showing various Ai Chip Design Rtl job openings in Austin, TX as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $138,143 per year, or $66.4 per hour.

Senior RTL Design Engineer

Mythic

Austin, TX • On-site

$120K - $225K/yr

Full-time

Re-posted yesterday

Job description

We’re hiring experienced RTL Design Engineers to play a key role in designing and implementing the components that will bring our next-generation AI processors to life.
 
About Us:
Mythic is building the future of AI computing with breakthrough analog technology that delivers 100× the performance of traditional digital systems at the same power and cost. This unlocks bigger, more capable models and faster, more responsive applications - whether in edge devices like drones, robotics, and sensors, or in cloud and data center environments. Our technology powers everything from large language models and CNNs to advanced signal processing, and is engineered to operate from –40 °C to +125 °C, making it ideal for industrial, automotive, aerospace, and defense.
 
We’ve raised over $100M from world-class investors including Softbank, Threshold Ventures, Lux Capital, and DCVC, and secured multi-million-dollar customer contracts across multiple markets.
 
The salary range for this position is $120,000–$225,000+ annually. Actual compensation depends on experience, skills, qualifications, and location.
 
RTL Design at Mythic:
At Mythic, our RTL design team is at the heart of transforming our custom digital dataflow architecture into working silicon. This architecture incorporates a novel scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines. Together with our Analog Compute Engines, these critical technologies enable unprecedented efficiency for modern AI workloads. RTL engineers take ownership of microarchitecture and RTL implementation, designing high-performance, low-power logic that drives our breakthrough AI hardware.
 
The team works closely with architecture, custom analog IP, compiler, verification, emulation, and post-silicon groups to ensure every component integrates seamlessly into the full system. Because today’s AI workloads push the limits of performance, memory, and efficiency, our RTL engineers apply both creativity and rigor to deliver designs that meet aggressive PPA (performance, power, area) goals while ensuring correctness. We welcome engineers at all levels who are excited to tackle challenging design problems and play a key role in building the next generation of AI compute hardware.
Responsibilities
  • Design and implement RTL for Mythic's next-generation AI processor.
  • Contribute to the development of a novel digital dataflow architecture, including a sophisticated scheduling subsystem, high-performance interconnect fabric, and advanced DMA engines.
  • Develop and optimize high-performance, low-power components such as datapaths, controllers, memory subsystems, and interconnects.
  • Collaborate with architects and verification engineers to define microarchitecture and ensure functional correctness.
  • Drive timing closure by working closely with synthesis and physical design teams.
  • Participate in design reviews and contribute to improving RTL coding practices and methodologies.
Requirements
  • Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer Engineering, or Computer Science.
  • 8+ years of industry experience in RTL design, microarchitecture, and architecture development.
  • Solid understanding of computer architecture fundamentals (pipelines, caches, coherence, memory hierarchies).
  • Hands-on experience with one or more of the following subsystems: scheduling fabrics, high-performance interconnects, DMA engines, memory controllers, or datapath/control logic.
  • Proficiency in Verilog/SystemVerilog and industry-standard RTL coding guidelines.
  • Familiarity with timing constraints, physical design considerations, and EDA flows.
  • Hands-on experience with simulation, synthesis, linting, and static timing analysis tools.
  • Strong problem-solving and communication skills with ability to work in cross-functional teams.
Preferred Qualifications
  • Familiarity with network-on-chip (NoC) architectures.
  • Expertise in low-power design techniques (clock gating, power gating, multi-voltage domains).
  • Experience with timing closure in advanced technology nodes and collaboration with physical design teams.
  • Strong skills in performance modeling and trade-off analysis (PPA optimization).
  • Hands-on experience with emulation/FPGA prototyping for early RTL validation.
  • Familiarity with AI, DSP, or other parallel compute architectures.
  • Strong scripting ability (Python or similar) for design automation and productivity.
At Mythic, we foster a collaborative and respectful environment where people can do their best work. We hire smart, capable individuals, provide the tools and support they need, and trust them to deliver. Our team brings a wide range of experiences and perspectives, which we see as a strength in solving hard problems together. We value professionalism, creativity, and integrity, and strive to make Mythic a place where every employee feels they belong and can contribute meaningfully.