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Asic Layout Design Engineer Jobs (NOW HIRING)

Staff Layout Design Engineer

Raleigh, NC ยท On-site

$144K - $187K/yr

Staff Layout Design Engineer Experience Level: Professional Job Type: Regular Location: Raleigh, NC, US, 27560 Austin, TX, US, 73344 Sacramento, CA, US, 94204 Sacramento, CA, US, 94204 Denver, CO, US ...

Analog Layout Design Engineer

Hillsboro, OR ยท On-site

$220K/yr

The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...

Analog Layout Design Engineer

Hillsboro, OR ยท On-site

$220K/yr

The Role and Impact Intel is seeking a passionate and skilled Analog Layout Design Engineer to join our diverse and inclusive team. As a critical contributor to our design ecosystem, you will drive ...

Digital Layout Design Engineer

San Diego, CA ยท On-site

$166K - $296K/yr

Exceed engineering specifications and expectations. * Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications

Digital Layout Design Engineer

Santa Clara, CA ยท On-site

$144K - $263K/yr

Exceed engineering specifications and expectations. * Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications

Staff Layout Design Engineer

Raleigh, NC ยท On-site

$144K - $187K/yr

In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using ...

Staff Layout Design Engineer

Sacramento, CA ยท On-site

$144K - $187K/yr

In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using ...

Staff Layout Design Engineer

Austin, TX ยท On-site

$144K - $187K/yr

In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using ...

Staff Layout Design Engineer

Denver, CO ยท On-site

$144K - $187K/yr

In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using ...

Staff Layout Design Engineer

Tallahassee, FL ยท On-site

$144K - $187K/yr

In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using ...

Staff Layout Design Engineer

Raleigh, NC ยท On-site

$144K - $187K/yr

In this position, you will work closely with design engineering groups to complete the layout and verification of high-performance Switches, Power Management Devices, and Integrated Products using ...

Showing results 41-60

ASIC Layout Design Engineer information

See salary details

$45K

$120.8K

$185.5K

How much do asic layout design engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for asic layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What is an ASIC layout design engineer?

ASIC Layout Design Engineers are specialized professionals who create the physical design of Application-Specific Integrated Circuits (ASICs). They translate circuit schematics into geometric representations that can be fabricated onto silicon chips, ensuring performance, power, and area specifications are met. Their work involves using electronic design automation (EDA) tools to place and route circuit elements while adhering to manufacturing constraints and design rules. They collaborate closely with circuit designers and verification engineers throughout the chip design process.

What are some common challenges faced by an ASIC layout design engineer in managing complex projects?

ASIC Layout Design Engineers often face challenges such as meeting tight design schedules, ensuring design rule compliance, and minimizing layout-induced circuit issues like parasitics and crosstalk. Balancing these technical demands with iterative feedback from verification and design teams requires effective communication and strong problem-solving skills. Additionally, staying updated with evolving EDA tools and process technologies is essential for delivering high-quality layouts within project constraints.

What are the key skills and qualifications needed to thrive as an ASIC layout design engineer, and why are they important?

To thrive as an ASIC Layout Design Engineer, you need expertise in semiconductor physics, VLSI design, and layout methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of process design kits (PDKs) are routinely required. Attention to detail, strong problem-solving abilities, and effective collaboration skills help engineers excel in this role. These skills are crucial for ensuring accurate, efficient, and manufacturable chip designs that meet performance and reliability standards.

What is the difference between Asic Layout Design Engineer vs Digital IC Design Engineer?

AspectAsic Layout Design EngineerDigital IC Design Engineer
Primary FocusPhysical layout and placement of ASIC componentsLogical design and architecture of digital circuits
Skills RequiredEDA tools, layout optimization, fabrication process knowledgeHDL coding, simulation, digital logic design
Work EnvironmentASIC design teams, fabrication facilitiesDesign houses, semiconductor companies
CertificationsTypically none specific, but familiarity with industry standardsHDL certifications, digital design courses

While both roles are integral to ASIC development, the Asic Layout Design Engineer focuses on the physical implementation of circuits, ensuring manufacturability and performance. In contrast, the Digital IC Design Engineer concentrates on the logical design and verification of digital circuits. Both roles require knowledge of digital design principles, but their daily tasks and skill sets differ significantly.

More about ASIC Layout Design Engineer jobs

What states have the most Asic Layout Design Engineer jobs?

States with the most job openings for Asic Layout Design Engineer jobs include:

What are popular job titles related to Asic Layout Design Engineer jobs?

For Asic Layout Design Engineer jobs, the most frequently searched job titles are:

Infographic showing various Asic Layout Design Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 87% Full Time, 9% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $120,849 per year, or $58.1 per hour.

Mixed Signal ASIC Layout Engineer with Security Clearance

Cambridge, MA โ€ข On-site

Digital Prospectors
51 - 200 employees

Contractor

Re-posted 2 days ago


Key responsibilities

  • Create complex analog layouts from schematics in collaboration with team members.

  • Perform physical layout tasks including floor-planning and circuit simulation.

  • Assist in ASIC development through layout design, problem solving, and executing tape outs.


Job description

Position: Mixed Signal ASIC Layout Engineer
Location: Boston, MA area (Hybrid)
Length: 6-12 Month Contract Job Description:
Seeking a talented and motivated individual to join the analog mixed signal team. Will be responsible for creating complex analog layouts from schematics in collaboration with other members of our incredible team. These layouts are used in ASICs for national security, biomedical, and space applications. While we are seeking a principal level engineer, considerations will be made at all levels for particularly capable applicants. A successful candidate will assist ASIC development through creating custom analog layouts, floor planning entire chips, high level problem solving, and executing tape outs. Skills with organizing and leading other layout engineers are also highly valued. Essential Duties and Responsibilities:
โ€ข Design and simulate circuits at transistor-level to implement architecture and requirement specifications
โ€ข Contribute to system-level design
โ€ข Optimize hardware designs for performance, power, and cost
โ€ข Evaluate the hardware feasibility of complex algorithms and requirements
โ€ข Independently contribute to complex chip architectures and designs
โ€ข Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements
โ€ข Contribute to business development and proposal activities
โ€ข Develop, document, and teach best practices to less experienced engineers
โ€ข Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitic, contribute to design-for-test development. Qualifications:
โ€ข Requires a bachelors degree in engineering, or related field. Masters degree preferred.
โ€ข Requires 7-10 years of experience with a bachelor's degree, or 5-10 years of experience with a master's degree in ASIC Hardware Engineering or related.
โ€ข Proficiency in integrated circuit design
โ€ข Understanding of integrated circuits, semiconductors, and general computer architecture
โ€ข Ability to write detailed design specifications
โ€ข Ability to lead multi-disciplinary technical teams
โ€ข Excellent verbal and written communication skills
โ€ข Excellent mathematical skills. Excellent organizational skills and attention to detail
โ€ข Excellent time management skills with the proven ability to meet deadlines
โ€ข Demonstrate strong organization, planning, and time management skills to achieve program goals Preferred:
โ€ข Experience with low power circuit design
โ€ข Experience with CMOS advanced nodes below 32nm
โ€ข Experience with radiation-hardened electronics POST-OFFER BACKGROUND CHECK IS REQUIRED. Digital Prospectors is an Equal Opportunity Employer and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other characteristic protected by law. Digital Prospectors affirms the right of all individuals to equal opportunity and prohibits any form of discrimination or harassment. Come see why DPC has achieved:
โ€ข 4.9/5 Star Glassdoor rating and the only staffing company (< 1000 employees) to be voted in the national Top 10 โ€˜Employeeโ€™s Choice - Best Places to Workโ€™ by Glassdoor.
โ€ข Voted โ€˜Best Staffing Firm to Temp/Contract Forโ€™ 8 consecutive years in a row by Staffing Industry Analysts as well as a โ€˜Best Company to Work Forโ€™ by Forbes, Fortune and Inc. magazine. As you are applying, please join us in fostering diversity, equity, and inclusion by completing the Invitation to Self-Identify form today! www.LoveYourJob.com