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Asic Layout Design Engineer Jobs (NOW HIRING)

Apple

Digital Layout Design Engineer

Austin, TX · On-site

... engineering specifications and expectations. -Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications ...

Superbeo

Analog Layout Design Engineer

Santa Clara, CA · On-site

Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...

Apple

Digital Layout Design Engineer

Austin, TX

$166K - $296K/yr

  • Medical

  • Dental

  • Retirement

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX · On-site

... engineering specifications and expectations. -Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications ...

Socket.dev

Digital Layout Design Engineer

Austin, TX · On-site

$140 - $200/hr

Exceed engineering specifications and expectations. * Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. MINIMUM QUALIFICATIONS ...

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ASIC Layout Design Engineer information

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$45K

$120.8K

$185.5K

How much do asic layout design engineer jobs pay per year?

As of Aug 16, 2026, the average yearly pay for asic layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What is an ASIC layout design engineer?

ASIC Layout Design Engineers are specialized professionals who create the physical design of Application-Specific Integrated Circuits (ASICs). They translate circuit schematics into geometric representations that can be fabricated onto silicon chips, ensuring performance, power, and area specifications are met. Their work involves using electronic design automation (EDA) tools to place and route circuit elements while adhering to manufacturing constraints and design rules. They collaborate closely with circuit designers and verification engineers throughout the chip design process.

What are some common challenges faced by an ASIC layout design engineer in managing complex projects?

ASIC Layout Design Engineers often face challenges such as meeting tight design schedules, ensuring design rule compliance, and minimizing layout-induced circuit issues like parasitics and crosstalk. Balancing these technical demands with iterative feedback from verification and design teams requires effective communication and strong problem-solving skills. Additionally, staying updated with evolving EDA tools and process technologies is essential for delivering high-quality layouts within project constraints.

What are the key skills and qualifications needed to thrive as an ASIC layout design engineer, and why are they important?

To thrive as an ASIC Layout Design Engineer, you need expertise in semiconductor physics, VLSI design, and layout methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of process design kits (PDKs) are routinely required. Attention to detail, strong problem-solving abilities, and effective collaboration skills help engineers excel in this role. These skills are crucial for ensuring accurate, efficient, and manufacturable chip designs that meet performance and reliability standards.

What is the difference between Asic Layout Design Engineer vs Digital IC Design Engineer?

AspectAsic Layout Design EngineerDigital IC Design Engineer
Primary FocusPhysical layout and placement of ASIC componentsLogical design and architecture of digital circuits
Skills RequiredEDA tools, layout optimization, fabrication process knowledgeHDL coding, simulation, digital logic design
Work EnvironmentASIC design teams, fabrication facilitiesDesign houses, semiconductor companies
CertificationsTypically none specific, but familiarity with industry standardsHDL certifications, digital design courses

While both roles are integral to ASIC development, the Asic Layout Design Engineer focuses on the physical implementation of circuits, ensuring manufacturability and performance. In contrast, the Digital IC Design Engineer concentrates on the logical design and verification of digital circuits. Both roles require knowledge of digital design principles, but their daily tasks and skill sets differ significantly.

More about ASIC Layout Design Engineer jobs

What states have the most Asic Layout Design Engineer jobs?

States with the most job openings for Asic Layout Design Engineer jobs include:

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ASIC Layout Design Engineer jobs near you
Infographic showing various Asic Layout Design Engineer job openings in the United States as of August 2026, with employment types broken down into 1% Internship, 88% Full Time, 6% Part Time, and 5% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $120,849 per year, or $58.1 per hour.

SMTS Silicon Design Engineer

Advanced Micro Devices, Inc

Austin, TX • On-site

$156K/yr

Full-time

Re-posted 9 days ago

Advanced Micro Devices rating

8.6

Company rating: 8.6 out of 10

Based on 13 frontline employees who took The Breakroom Quiz

27th of 157 rated electronics manufacturers

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.
At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we're looking for talent who feel the same: people who want to leave the planet better than they found it, those who don't shy away from humanity's challenges but are determined to help solve them.
AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you're designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger - technology that moves the world forward.
Job Role and Responsibility: AMD, Inc., is hiring SMTS Silicon Design Engineer to Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing, employing knowledge of electronic theory. Lead definition, design, verification, and/or documentation for ASIC development. Determine architecture design, logic design, and/or system simulation. Define module interfaces/formats for simulation. Lead the development of multidimensional designs involving the layout of complex integrated circuits. Evaluate all aspects of the process flow from high-level designs to synthesis, place and route, and timing and power use. Work with cross-functional teams including engineers to develop ASIC/layout design, working on significant and unique issues where analysis of situations or data requires an evaluation of intangibles. Drive projects or processes of significant technical importance. Exercise independent judgment to select methods, techniques and evaluation criteria for obtaining results with little to no supervision. Utilize unique knowledge of computers and electronics, including circuit boards, processors, chips, electronic equipment, design techniques, tools, and principles to contribute to the development of company objectives and principles and to achieve goals in creative and effective ways. Apply knowledge of engineering principles, best practices, and technologies to the design, development, and testing of various AMD products.
Multiple openings. Qualified applicants click "APPLY NOW" button to apply online.
Travel required: NO
Qualifications: Degree required
Master's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field.
Qualifications: Amount and type of experience required: Four (4) years of experience in the job offered or closely related engineering role.
Alternate combination of education and experience: Employer will alternatively accept a Bachelor's degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field and six (6) years of progressive post-baccalaureate experience in the job offered or closely related engineering role.
Specific skills required: The following skills are required:
Position requires four (4) years of experience in the following:
  • Power Via and 3DStack concepts;
  • Supporting design teams through successful tape-outs;
  • Layout editing tools: Design REV or ICVWB;
  • Hardware verification;
  • CMOS transistor design;
  • CAD tools;
  • ASIC design;
  • Design flows and methodologies used for chip verification;
  • Back-End (physical design) EDA tools;
  • Linux or Windows internals; and
  • Code optimization using the GPU or software performance analysis.

Preferred Skills: N/A
#LI-AM4
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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