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Vlsi Design Verification Engineer Jobs in Michigan

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

The Roof Systems Design Release Engineer (DRE) is responsible for the engineering, design ... Design Verification Plan & Report (DVPR) testing; change management; bill of material maintenance ...

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

... design verification plan, physical testing, management of suppliers, issuing change notices ... The engineer will: * Interface with Vehicle Engineering, suppliers, Purchasing, Quality and ...

Mechanical Design Engineer II

Allen Park, MI · On-site

$69K - $93K/yr

We fuse technology and engineering to provide product development solutions to customers in a ... Rs (Design Verification Plan & Reports/Failure Mode), DFM (Design for Manufacturing), and FEA ...

Mechanical Design Engineer II

Allen Park, MI · On-site

$69K - $93K/yr

We fuse technology and engineering to provide product development solutions to customers in a ... Rs (Design Verification Plan & Reports/Failure Mode), DFM (Design for Manufacturing), and FEA ...

Senior Mechanical Design Engineer

Allen Park, MI · On-site

$82K - $113K/yr

We fuse technology and engineering to provide product development solutions to customers in a ... Rs (Design Verification Plan & Reports/Failure Mode), DFM (Design for Manufacturing), and FEA ...

Senior Mechanical Design Engineer

Allen Park, MI · On-site

$82K - $113K/yr

We fuse technology and engineering to provide product development solutions to customers in a ... Rs (Design Verification Plan & Reports/Failure Mode), DFM (Design for Manufacturing), and FEA ...

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Create, maintain, and manage the Design Verification Plan & Report (DVP&R) and Design Failure Modes ... Utilize Computer-Aided Engineering (CAE) tools to conduct simulations and analyses, optimizing ...

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Create, maintain, and manage the Design Verification Plan & Report (DVP&R) and Design Failure Modes ... Utilize Computer-Aided Engineering (CAE) tools to conduct simulations and analyses, optimizing ...

Mechanical Design Engineer II

Allen Park, MI · Hybrid

$69K - $93K/yr

We fuse technology and engineering to provide product development solutions to customers in a ... Rs (Design Verification Plan & Reports/Failure Mode), DFM (Design for Manufacturing), and FEA ...

Showing results 21-40

Vlsi Design Verification Engineer information

See Michigan salary details

$92K

$130K

$145.6K

How much do vlsi design verification engineer jobs pay per year?

As of Sep 1, 2026, the average yearly pay for vlsi design verification engineer in Michigan is $129,998.00, according to ZipRecruiter salary data. Most workers in this role earn between $118,500.00 and $144,700.00 per year, depending on experience, location, and employer.

What is a VLSI design verification engineer?

A VLSI Design Verification Engineer is a specialist responsible for ensuring that integrated circuits (ICs) and systems-on-chip (SoCs) meet their design specifications before manufacturing. They use various verification methodologies, such as simulation, formal verification, and hardware emulation, to identify and fix functional errors in digital designs. Their role is critical in the semiconductor industry to ensure product quality, reduce costly re-spins, and speed up time-to-market. They often work closely with design engineers, using tools like SystemVerilog, UVM, and other verification frameworks.

What are the key skills and qualifications needed to thrive as a VLSI design verification engineer?

To thrive as a VLSI Design Verification Engineer, you need a solid background in digital logic design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with hardware description languages like Verilog or VHDL, simulation tools such as ModelSim or Synopsys VCS, and familiarity with UVM or SystemVerilog are commonly required. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for identifying design flaws and collaborating with cross-functional teams. These skills and qualifications ensure accurate, reliable chip designs and efficient project execution in the competitive semiconductor industry.

What are some common challenges faced by VLSI design verification engineers during the verification process?

VLSI Design Verification Engineers often encounter challenges such as managing increasingly complex system-on-chip (SoC) designs, ensuring thorough test coverage, and debugging intricate functional issues. Coordinating with cross-functional teams—like design, software, and validation—is essential to align test plans and resolve ambiguities quickly. Additionally, keeping up with evolving verification methodologies and tools (such as UVM or SystemVerilog) requires a commitment to continuous learning, but offers strong career growth opportunities for those who master them.

What is the difference between Vlsi Design Verification Engineer vs Vlsi Design Engineer?

AspectVlsi Design Verification EngineerVlsi Design Engineer
Primary FocusVerifying the correctness of VLSI designs through testing and simulationCreating and implementing VLSI chip designs and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scripting, knowledge of verification methodologiesHDL, digital design, synthesis, timing analysis, and physical design skills
Work EnvironmentDesign teams, verification labs, simulation environmentsDesign teams, synthesis and implementation tools, physical design environments

While both roles require HDL knowledge and work within VLSI teams, the Vlsi Design Verification Engineer primarily focuses on testing and validating designs, whereas the Vlsi Design Engineer is responsible for creating and implementing the actual chip designs.

Are Vlsi Design Verification Engineers in demand?

Vlsi Design Verification Engineers are in high demand due to the growth of semiconductor and electronics industries, requiring expertise in hardware description languages like Verilog and SystemVerilog. The role often involves working with simulation tools and verification methodologies such as UVM, and demand is strong in regions with advanced chip manufacturing and design centers.

What are popular job titles related to Vlsi Design Verification Engineer jobs in Michigan?

For Vlsi Design Verification Engineer jobs in Michigan, the most frequently searched job titles are:

What job categories do people searching Vlsi Design Verification Engineer jobs in Michigan look for?

The top searched job categories for Vlsi Design Verification Engineer jobs in Michigan are:

What cities in Michigan are hiring for Vlsi Design Verification Engineer jobs?

Cities in Michigan with the most Vlsi Design Verification Engineer job openings:

Infographic showing various Vlsi Design Verification Engineer job openings in Michigan as of August 2026, with employment types broken down into 86% Full Time, 9% Part Time, 4% Contract, and 1% Nights. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $129,998 per year, or $62.5 per hour.

Design Release Engineer

Stefanini Group

Auburn Hills, MI • On-site

$28 - $33/hr

Contractor

Re-posted 15 days ago


Job description

Details:
Stefanini Group is hiring!
Stefanini is looking for a Design Release Engineer, Auburn Hills, MI
For quick apply, please reach out to Lovkesh Bharti at 248-727-2506/lovkesh.bharti@stefanini.com
Design Release Engineer will be responsible for the design, development, timing and production release of a system/component within Fuels Systems: Filler pipes, Fuel lines, Fuel Cap & Capless. Other responsibilities will include quality improvements, value optimization, weight reduction and other efficiency improvement initiatives including communicating technical product status to management. The Design Release Engineer will interact with suppliers and will work closely with internal and external groups such as testing and prototype labs, Design Team, CAE engineers, vehicle program team, supplier operations and manufacturing plants.
Responsibilities
  • Deliver all program milestone requirements on time and with quality
  • Manage design changes to components and resolve functional, durability, assembly issues as required
  • Utilize engineering tools such as DFMEA, PFMEA, DVP&R, application & adherence of specifications & best practices
  • Lead technical design reviews for components at key program milestones and at management reviews
  • Review validation setup at internal location or supplier, ensuring testing is performed to specification, review test results for accuracy and compliance requirements and report results to management
  • Collaborate with cross functional teams (safety, packaging, program, design, advanced manufacturing) to ensure robust design of fuel components through program milestones & launch
  • Be on site at production plant & engineering office to support builds and issue resolution
  • Ensure quality post program launch by supporting warranty reviews

Job Requirements
Details:
Experience Required
  • Self-starter with strong leadership, communication & organizational skills and demonstrated problem solving ability.
  • Experience in the following areas would be beneficial: Formula SAE, Baja, or similar experience in college.

Experience Preferred
  • 5 or more years of design/development automotive engineering experience in Fuel Systems and/or UREA, will consider an internship with Fuel/Urea Systems as part of that experience as well as Plant Quality/Manufacturing Engineering experience.
  • Prototype experience.
  • Experience with Design Failure Mode & Effects Analysis (DFMEA).
  • Experience with Design Verification Plan & Report (DVP&R).
  • Design for Six Sigma (DFSS) preferred Belt certification.
  • Solid understanding of system/component design.
  • General understanding of NX, TeamCenter and Bill of Material Management (EBOM/Codep/PLM/Other).

Education Required
  • Bachelor of Science degree in Mechanical Engineering, Mechatronics or Electrical Engineering or related degree field.

Education Preferred
  • Master of Science Degree in Engineering.

**Listed salary ranges may vary based on experience, qualifications, and local market. Also, some positions may include bonuses or other incentives***
Stefanini takes pride in hiring top talent and developing relationships with our future employees. Our talent acquisition teams will never make an offer of employment without having a phone conversation with you. Those face-to-face conversations will involve a description of the job for which you have applied. We will also speak with you about the process, including interviews and job offers.
About Stefanini Group
The Stefanini Group is a global provider of offshore, onshore and near shore outsourcing, IT digital consulting, systems integration, application, and strategic staffing services to Fortune 1000 enterprises around the world. Our presence is in countries like the Americas, Europe, Africa, and Asia, and more than four hundred clients across a broad spectrum of markets, including financial services, manufacturing, telecommunications, chemical services, technology, public sector, and utilities. Stefanini is a CMM level 5, IT consulting company with a global presence. We are a CMM Level 5 company.
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Pay Range:
$ 28.00 - $ 33.00