Systemc Modeling Engineer Jobs in Arizona (NOW HIRING)

Job Details:Job Description: 

Intel is seeking a highly qualified candidate to lead firmware architecture and innovation in a dynamic and forward-thinking organization focused on next-generation semiconductor product development. Our team focuses on being nimble, adaptable, lean and efficient to drive cutting-edge, customer impacting technology development. We embrace innovative and efficient methodologies that drive at-scale product execution. As a Principal Firmware Engineer, you will drive the architecture, design, and implementation of firmware for IP and subsystem components in system-on-chip (SOC) products. This role requires a deep understanding of SOC and system-level architecture, firmware development in resource-constrained environments, and hardware/firmware co-engineering methodologies to ensure the highest quality product delivery. The position emphasizes pioneering new approaches to firmware development - including AI-assisted engineering workflows - and architecting for flexibility and graceful future evolution across multiple disciplines. If you are passionate about building products faster and more efficiently than anyone else on the planet, we want you on our team.
Key Responsibilities
Architect firmware for solutions across IP, SoC and Platform, modeling to ensure architectural correctness before implementation.
Drive innovation in both product architecture and development methodology, running rapid experiments to learn and adjusting direction on insight.
Leverage and extend AI-powered engineering tools and workflows to accelerate product definition, software development, improve code quality, and scale team productivity - treating AI as a core part of the engineering toolkit, not an afterthought.
Design and implement embedded firmware in environments with constrained timing and memory resources, using C, C++, SystemC, and Python across pre- and post-silicon environments (RTL simulation, SystemC modeling, emulation).
Collaborate fluidly across architecture, design, firmware, validation, and software teams - forming focused teams to solve problems, produce results, and move on.
Develop and refine co-engineering processes and tools for HW/FW co-validation, including test infrastructure, automation, and supporting frameworks.
Architect systems for flexibility and graceful evolution, applying disciplined judgment about what to include and what to leave out.
Mentor engineers and raise the technical bar through rigorous code reviews, clear technical writing, and leading by example.
Leverage industry standards, architectures, interfaces, IP, tools, and flows to work seamlessly within the broader ecosystem.

Qualifications:

Minimum Qualifications
Bachelor's degree with 12+ years, in Computer Science, Computer Engineering, Electrical Engineering, or a related STEM discipline.
Experience with one of more of the following:
o Architecture and development of low-level software/firmware requiring direct interaction with hardware.
o Proficiency in C, C++, and/or SystemC.
o Firmware debugging and development for embedded systems in constrained environments.
o Leading architectural definitions for cross-functional SoC, IP, or Platform teams through architecture, design, firmware, and validation to ship high-volume production silicon.
o Development of hardware/firmware co-engineering methodologies (co-validation, modeling, simulation, emulation).
o Development of processes, tools, or test infrastructure for SoC or IP design and validation.
Demonstrated ability to solve complex system-level problems spanning technical and organizational boundaries.
Strong technical communication skills - clear writing that reflects clear thinking - with proven experience across technical and non-technical audiences.
Preferred Qualifications

Master's degree with 10+ years, or PhD with 8+ years in Computer Science, Computer Engineering, Electrical Engineering, or a related STEM discipline.
Self-directed and adaptable - thrives in lean teams, takes ownership regardless of organizational structure, and holds themselves and teammates accountable for results.
Passion for building tools and processes that make the entire team faster, not just individual productivity.
Experience using AI-assisted development tools (e.g., GitHub Copilot, AI-driven code generation, AI-augmented validation) and extending or customizing AI tooling for engineering workflows.
Experience with RTL simulation environments (e.g., SystemVerilog testbenches, UVM) and SOC emulation platforms for firmware bring-up and debug.
Experience with SystemC/TLM modeling for firmware co-validation and architectural exploration.
Experience with SoC subsystem firmware for power management, telemetry, interrupts, memory management, RAS, and/or security.
Experience with cache-coherent SoC fabrics, chiplet interconnects (e.g., UCIe), or high-speed I/O interfaces (e.g., PCIe, CXL).
Track record of shipping innovative firmware solutions in high-volume silicon products.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, AustinBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $233,990.00-330,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.