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Sta Static Timing Analysis Engineer Jobs in Indiana

SAIC

Electrical Engineer

Crane, IN · On-site

Engineering and Sciences Subcategory: Electrical Engr Schedule: Full-Time Shift: Day Job Travel ... Monitor and analyze real-time model execution timelines * Resolve timing issues affecting weapon ...

SAIC

Electrical Engineer

Crane, IN · On-site

Monitor and analyze real-time model execution timelines * Resolve timing issues affecting weapon ... Collaborate closely with system engineers, software developers, real-time modelers, and test ...

Ghafari As

Packaging Engineer

Warsaw, IN · On-site

Support RFQ packages, quote reviews, supplier selection, purchase order timing, and production ... Strong analytical, problem-solving, communication, and project management skills. * Able to work ...

Ghafari Associates, LLC

Packaging Engineer

Warsaw, IN · On-site

Support RFQ packages, quote reviews, supplier selection, purchase order timing, and production ... Strong analytical, problem-solving, communication, and project management skills.* Able to work ...

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Sta Static Timing Analysis Engineer information

What is a STA static timing analysis engineer?

STA (Static Timing Analysis) Engineers are specialists in the semiconductor industry who analyze and verify the timing performance of digital circuits without requiring dynamic simulation. They use specialized software tools to ensure that signal transitions occur within required time constraints, preventing issues like data corruption or circuit malfunction. Their work is crucial in the design and validation stages of integrated circuits (ICs), helping to guarantee that chips will function reliably at specified speeds and under different conditions.

What are the key skills and qualifications needed to thrive as a STA static timing analysis engineer?

To thrive as a Static Timing Analysis Engineer, you need a solid background in digital circuit design, timing concepts, and typically a degree in electrical or computer engineering. Proficiency with EDA tools such as Synopsys PrimeTime, Cadence Tempus, and scripting languages like TCL or Perl is essential. Strong problem-solving abilities, attention to detail, and effective communication skills set top performers apart in this role. These competencies ensure accurate timing verification, efficient collaboration, and successful delivery of complex semiconductor projects.

What are some common challenges faced by STA static timing analysis engineers during project cycles?

STA Static Timing Analysis Engineers often encounter challenges related to tight project deadlines and complex design specifications. Balancing multiple design corners, managing timing closure for increasingly smaller technology nodes, and coordinating with physical design, synthesis, and verification teams are key hurdles. Additionally, staying updated with evolving EDA tools and methodologies is essential to ensure accurate analysis. Effective communication and troubleshooting skills are critical to resolve timing violations and deliver high-quality silicon on schedule.

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Sta Static Timing Analysis Engineer jobs near you
Infographic showing various Sta Static Timing Analysis Engineer job openings in Indiana as of June 2026, with employment types broken down into 68% Full Time, 3% Part Time, 28% Contract, and 1% Nights. Highlights an 84% Physical, 3% Hybrid, and 13% Remote job distribution.

Electrical Engineer

Crane, IN

Science Applications International Corporation
IT Services • 10K+ employees
Learn more about Science Applications International Corporationexternal

Full-time

Re-posted 29 days ago

SAIC rating

7.7

Company rating: 7.7 out of 10

Based on 82 frontline employees who took The Breakroom Quiz

Job description

SAIC is seeking a Senior Electrical Engineer with deep experience troubleshooting and supporting HardwareintheLoop (HWIL) test environments. The selected candidate will play a crucial role in the development, integration, and test of a nextgeneration Hypersonic Missile System, supporting realtime test operations, electrical diagnostics, and weaponsystemlevel performance verification.

This position requires onsite support at NSWC Crane to enable handson work with lab hardware, missile subsystem interfaces, and highfidelity realtime simulation equipment.

Key Responsibilities:

HWIL System Troubleshooting & Diagnostics

  • Diagnose and resolve issues within complex HWIL testbeds involving sensors, avionics, embedded computing, and closedloop weaponsystem interfaces
  • Identify root causes related to component failures, degraded signals, hardware performance, or timing anomalies
  • Conduct detailed fault isolation across interconnected hardware, simulation nodes, and networked weaponsystem components

Electrical Checkout & Hardware Validation

  • Perform electrical verification tasks including: 
    • Identification of loose or intermittent connections
    • Troubleshooting faulty or damaged wiring/cabling
    • Evaluating line integrity, grounding, shielding, and signal quality
  • Support integration of new missile subsystems, instrumentation, and test rack hardware

Network Analysis & WeaponSystem Communication Troubleshooting

  • Analyze and verify complex system networks to ensure correct signal transmission, data routing, and message integrity across realtime simulation components
  • Develop an operational understanding of weaponsystem networking architectures, including component interfaces, comms pathways, and timing requirements
  • Support protocols commonly used in realtime missile and DoD systems (e.g., Ethernet, deterministic realtime protocols, serial interfaces, MILSTD data links, etc.)

RealTime Execution Performance Analysis

  • Diagnose causes of simulation overruns, delayed model execution, and desynchronization between hardware devices, sensors, and realtime compute nodes
  • Monitor and analyze realtime model execution timelines
  • Resolve timing issues affecting weaponsystemlevel closedloop simulations

Documentation, Collaboration & Lab Support

  • Document troubleshooting steps, root causes, and corrective actions
  • Collaborate closely with system engineers, software developers, realtime modelers, and test operators
  • Support test readiness reviews, lab configuration updates, and integration events for the hypersonic program
SAIC is a premier mission integrator focused on advancing the power of technology and innovation to serve and protect our world. Our robust portfolio of offerings across the defense, space, intelligence, and civilian markets includes secure high-end solutions in mission IT, enterprise IT, engineering services, and professional services. We integrate emerging technology, rapidly and securely, into mission critical operations that modernize and enable critical national imperatives.

We are approximately 23,000 strong; driven by mission, united by purpose, and inspired by opportunities. SAIC is an Equal Opportunity Employer. Headquartered in Reston, Virginia, SAIC has annual revenues of approximately $7.3 billion. For more information, visit saic.com. For ongoing news, please visit our newsroom.

Required Education and Experience:

  • Bachelor's degree in Electrical Engineering or related hardware electrical engineering discipline and 2 or more years of experience. 
  • Experience working with HWIL environments, tactical hardware, or realtime test systems
  • Demonstrated experience diagnosing electrical and hardware failures in complex integrated systems
  • Strong understanding of system networks, message flows, signal routing, and communication protocols
  • Experience with realtime simulation/test frameworks (e.g., iHawk, Speedgoat, RT Linux, or similar)
  • Interim secret clearance required to start with the ability to obtain a secret clearance. SAIC will sponsor the clearance process
  • Ability to work 100% onsite at NSWC Crane

Desired Experience:

  • Network+ or equivalent certification (Security+, CCNA, etc.)
  • Experience reviewing or modifying wiring diagrams, harness documentation, and system schematics
  • Knowledge of avionics interfaces, deterministic timing systems, or secure DoD network architectures
  • Familiarity with HPC computing, MILSTD communication protocols, V&V and Systems Engineering processes

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