Senior SRAM Engineer
OR · On-site +1
Design best-in-class SRAM circuits using state-of-the-art technology processes Optimize circuits for performance, area, and power Collaborate with mask designers to craft high quality and dense pitch ...
Senior SRAM Engineer
OR · On-site +1
Design best-in-class SRAM circuits using state-of-the-art technology processes Optimize circuits for performance, area, and power Collaborate with mask designers to craft high quality and dense pitch ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Design best-in-class SRAM circuits using state-of-the-art technology processes Optimize circuits for performance, area, and power Collaborate with mask designers to craft high quality and dense pitch ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Design best-in-class SRAM circuits using state-of-the-art technology processes Optimize circuits for performance, area, and power Collaborate with mask designers to craft high quality and dense pitch ...
Postdoctoral Fellow - ECE Y. Zhang
Charlotte, NC · On-site
$60K/yr
SRAM design, fabrication, and testing: Expertise in all areas is highly preferred * Design, fabrication, and testing of photonic integrated: Experience in these fields will be considered a ...
Postdoctoral Fellow - ECE Y. Zhang
Charlotte, NC · On-site
$60K/yr
SRAM design, fabrication, and testing: Expertise in all areas is highly preferred * Design, fabrication, and testing of photonic integrated: Experience in these fields will be considered a ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Design best-in-class SRAM circuits using state-of-the-art technology processes * Optimize circuits for performance, area, and power * Collaborate with mask designers to craft high quality and dense ...
Senior SRAM Engineer
Santa Clara, CA · On-site
Design best-in-class SRAM circuits using state-of-the-art technology processes * Optimize circuits for performance, area, and power * Collaborate with mask designers to craft high quality and dense ...
Design best-in-class SRAM circuits using state-of-the-art technology processes * Optimize circuits for performance, area, and power * Collaborate with mask designers to craft high quality and dense ...
Design best-in-class SRAM circuits using state-of-the-art technology processes * Optimize circuits for performance, area, and power * Collaborate with mask designers to craft high quality and dense ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation ...
Computer Architecture, Computer Arithmetic, Object-Oriented Programming, Functional Coverage, CMOS Transistors, Circuits, System-on-Chip (SoC), SRAM Design * Architectural Tradeoff Analysis, Power ...
Computer Architecture, Computer Arithmetic, Object-Oriented Programming, Functional Coverage, CMOS Transistors, Circuits, System-on-Chip (SoC), SRAM Design * Architectural Tradeoff Analysis, Power ...
Design self-service workflows that enable business teams to move at SRAM's pace on routine transactions without requiring direct lawyer involvement on every deal * Build and continuously improve the ...
Design self-service workflows that enable business teams to move at SRAM's pace on routine transactions without requiring direct lawyer involvement on every deal * Build and continuously improve the ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
... SRAM Design Architectural Tradeoff Analysis, Power and Noise Analysis, Silicon Instrumentation and Measurement CAD and Physical Design Methodologies (Flow and Tools Development), Chop Floorplan ...
... SRAM Design Architectural Tradeoff Analysis, Power and Noise Analysis, Silicon Instrumentation and Measurement CAD and Physical Design Methodologies (Flow and Tools Development), Chop Floorplan ...
Computer Architecture, Computer Arithmetic, Object-Oriented Programming, Functional Coverage, CMOS Transistors, Circuits, System-on-Chip (SoC), SRAM Design * Architectural Tradeoff Analysis, Power ...
Computer Architecture, Computer Arithmetic, Object-Oriented Programming, Functional Coverage, CMOS Transistors, Circuits, System-on-Chip (SoC), SRAM Design * Architectural Tradeoff Analysis, Power ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation ...
Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation ...
Senior SRAM Layout Design Engineer - Equity Eligible (Santa Clara)
Santa Clara, CA · On-site
$124K - $195K/yr
A leading technology company in California is seeking a Senior Layout Mask Design Engineer to work on custom SRAM designs using advanced FinFET technologies. The ideal candidate will have over 8 ...
Senior SRAM Layout Design Engineer - Equity Eligible (Santa Clara)
Santa Clara, CA · On-site
$124K - $195K/yr
A leading technology company in California is seeking a Senior Layout Mask Design Engineer to work on custom SRAM designs using advanced FinFET technologies. The ideal candidate will have over 8 ...
Associate Design Engineer
San Luis Obispo, CA · On-site
$71K - $80K/yr
At SRAM, we believe in expanding the potential of cycling, and that starts with you. KEY ... Design and develop high-quality, robust products that achieve project goals * Apply SRAM ...
Associate Design Engineer
San Luis Obispo, CA · On-site
$71K - $80K/yr
At SRAM, we believe in expanding the potential of cycling, and that starts with you. KEY ... Design and develop high-quality, robust products that achieve project goals * Apply SRAM ...
Commercial Counsel, Legal Architect
Chicago, IL · On-site
$120 - $160/hr
The Commercial Counsel - Legal Architect is a newly created position with a clear mandate: design and build the commercial legal foundation that SRAM's growth requires, then own and operate it at the ...
Commercial Counsel, Legal Architect
Chicago, IL · On-site
$120 - $160/hr
The Commercial Counsel - Legal Architect is a newly created position with a clear mandate: design and build the commercial legal foundation that SRAM's growth requires, then own and operate it at the ...
CPU Cache Microarchitect/RTL Engineer
Beaverton, OR · On-site
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
CPU Cache Microarchitect/RTL Engineer
Beaverton, OR · On-site
$184K - $324K/yr
... SRAM design basics, multiple clock/power domains and power management strategies, prefetchers, replacement policies, debug capabilities, DFT strategies, error detection and correction Understanding ...
Sram Design information
See salary details
$42K - $56.5K
4% of jobs
$56.5K - $71K
8% of jobs
$81.6K is the 25th percentile. Wages below this are outliers.
$71K - $85.5K
17% of jobs
The median wage is $99K / yr.
$85.5K - $100K
22% of jobs
$100K - $114.5K
15% of jobs
$114.5K - $129K
6% of jobs
$133.7K is the 75th percentile. Wages above this are outliers.
$129K - $143.5K
7% of jobs
$143.5K - $158K
7% of jobs
$158K - $172.5K
8% of jobs
$172.5K - $187K
2% of jobs
$187K - $201.5K
2% of jobs
$42K
$114.5K
$201.5K
How much do sram design jobs pay per year?
As of Sep 5, 2026, the average yearly pay for sram design in the United States is $114,491.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,500.00 and $144,000.00 per year, depending on experience, location, and employer.
What is a sram design?
An SRAM Design job involves designing and optimizing Static Random-Access Memory (SRAM) circuits for use in semiconductor devices. Engineers in this role work on transistor-level circuit design, layout, and verification to ensure high performance, low power consumption, and reliability. They collaborate with process engineers, digital designers, and verification teams to meet product specifications. Strong knowledge of CMOS technology, memory architecture, and simulation tools is essential for success in this field.
What are the key skills and qualifications needed to thrive in sram design?
To thrive in SRAM Design, you need a strong background in electrical engineering, semiconductor physics, and digital circuit design, often holding at least a bachelor's or master's degree in a related field. Familiarity with EDA tools like Cadence or Synopsys, experience with SPICE simulations, and understanding of process design kits (PDKs) are typically essential. Attention to detail, problem-solving abilities, and effective teamwork are important soft skills in this role. These skills are critical for developing reliable, efficient memory circuits and ensuring successful collaboration with cross-functional engineering teams.
What are some common challenges faced in sram design roles?
Professionals in SRAM Design often encounter challenges such as meeting aggressive power, performance, and area (PPA) targets while ensuring circuit reliability across various process corners and conditions. Debugging and optimizing circuits to avoid issues like data retention failures or access time violations are frequent aspects of the job. Additionally, collaborating with layout, verification, and product engineering teams requires strong communication and organizational skills. Embracing these challenges can lead to significant technical growth and open pathways for advancement into lead or architect roles in the future.
More about Sram Design jobs
What states have the most Sram Design jobs?
States with the most job openings for Sram Design jobs include:
What job categories do people searching Sram Design jobs look for?
The top searched job categories for Sram Design jobs are:
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
We are now looking for a Senior SRAM Engineer within our Full Custom Memory (FCM) team. The FCM team designs specialized RAM implementations across NVIDIAs wide array of processing chips. Be it high speed, low power, multiport, we engage closely with processor architecture teams to build custom solutions across the entire NVIDIA silicon portfolio.
Are you interested in designing circuits for the next generation of AI chips. Join a team of dedicated engineers developing the custom SRAM circuits that help power these chips. What you'll be doing: Design best-in-class SRAM circuits using state-of-the-art technology processes Optimize circuits for performance, area, and power Collaborate with mask designers to craft high quality and dense pitch-matched layout Verify functionality, electrical integrity, and robustness Improve/develop flows and methodologies to streamline design automation, data collection, and analysis to ensure working silicon What we need to see: BS/MS/PhD (or equivalent experience) in Electrical or Computer Engineering Minimum 12 years of circuit design experience Strong understanding of SRAM and memory design techniques and macro/block development Ways to stand out from the crowd: Self-motivation, attention to detail, clear data analysis and presentation skills Familiarity with industry tools such as Cadence Virtuoso for schematic and layout, SPICE simulators, waveform viewers Background with developing and using various flows and methodologies, including: Static Timing Analysis, EM and IR analysis, Formal Functional Verification Experience with scripting languages - Perl, Python, Shell, Verilog NVIDIA has continuously reinvented itself over two decades.
Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a "learning machine" that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world.
This is our life's work, to amplify human imagination and intelligence. Make the choice, join our diverse team today. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
The base salary range is 196,000 USD - 310,500 USD. You will also be eligible for equity and benefits. Applications for this job will be accepted at least until August 28, 2026.
This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer.
As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US