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Senior Asic Verification Engineer Jobs (NOW HIRING)

The NVIDIA System-On-Chip (SOC) group is looking for an experienced ASIC Verification Engineer! In this position you will have the chance to create a high-level and broad impact at NVIDIA working on ...

NVIDIA is seeking an outstanding ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real impact ...

ASIC Verification Engineer

Seattle, WA · On-site

$76.20K - $187.74K/yr

ASIC verification Engineer The role is 100% remote role About the job you're considering We are seeking an ASIC Verification Engineer with hands-on experience working on ARM-related IPs such as CPU ...

ASIC verification Engineer The role is 100% remote role About the job you're considering We are seeking an ASIC Verification Engineer with handson experience working on ARMrelated IPs such as CPU ...

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Senior Asic Verification Engineer information

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$11K

$135.1K

$181.5K

How much do senior asic verification engineer jobs pay per year?

As of May 29, 2026, the average yearly pay for senior asic verification engineer in the United States is $135,084.00, according to ZipRecruiter salary data. Most workers in this role earn between $112,000.00 and $161,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior ASIC Verification Engineer, and why are they important?

To thrive as a Senior ASIC Verification Engineer, you need a strong background in digital design, verification methodologies, and hardware description languages like Verilog or VHDL, often supported by a degree in electrical engineering or a related field. Expertise with simulation tools (e.g., ModelSim, VCS), scripting languages (such as Python or Perl), and familiarity with UVM or SystemVerilog is typically required. Analytical thinking, problem-solving, and effective communication are critical soft skills for collaborating with design teams and debugging complex systems. These skills ensure the delivery of high-quality, reliable ASIC products by efficiently identifying and resolving design issues.

What are some common challenges faced by Senior ASIC Verification Engineers during complex chip projects?

Senior ASIC Verification Engineers often encounter challenges such as managing verification of increasingly complex designs, tight project timelines, and ensuring comprehensive test coverage. Coordinating with cross-functional teams, like design and software, is essential to resolve specification ambiguities and address integration issues early. Additionally, staying updated with evolving verification methodologies (like UVM or SystemVerilog) and toolchains is crucial for maintaining efficiency and delivering high-quality results.

What are Senior ASIC Verification Engineers?

Senior ASIC Verification Engineers are experienced professionals responsible for ensuring that Application-Specific Integrated Circuits (ASICs) function correctly before manufacturing. They design and implement testbenches, develop verification plans, and use simulation tools to verify the functionality and performance of ASIC designs. These engineers often work closely with design teams to identify and debug issues, ensuring the final chip meets all specifications and requirements. Their expertise helps reduce costly design errors and accelerates the development of reliable semiconductor products.
What cities are hiring for Senior Asic Verification Engineer jobs? Cities with the most Senior Asic Verification Engineer job openings:
What are the most commonly searched types of Asic Verification Engineer jobs? The most popular types of Asic Verification Engineer jobs are:
What states have the most Senior Asic Verification Engineer jobs? States with the most job openings for Senior Asic Verification Engineer jobs include:
Infographic showing various Senior Asic Verification Engineer job openings in the United States as of May 2026, with employment types broken down into 77% Part Time, and 23% Contract. Highlights an 100% Physical job distribution, with an average salary of $135,084 per year, or $64.9 per hour.
Sr. ASIC Design Verification Engineer (Silicon Engineering)

Sr. ASIC Design Verification Engineer (Silicon Engineering)

SpaceX

Austin, TX

Other

Posted 8 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 142 frontline employees who took The Breakroom Quiz

12th of 59 rated aerospace companies


Job description

SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:

  • Responsible for digital ASIC verification at block and system level
  • Write and review test plans, develop test harnesses and test sequences
  • Responsible for test plan execution, running regressions, code and functional coverage closure
  • Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering or computer engineering
  • 5+ years of experience with design verification and test bench development

PREFERRED SKILLS AND EXPERIENCE:

  • Advanced degree in electrical engineering or computer engineering
  • Experience with verification methodologies such as UVM/OVM/VMM
  • Strong object-oriented programming knowledge
  • Strong problem-solving and coding skills
  • Experience in constrained random verification
  • Expertise in developing test plans, implementing coverage models, and analyzing results
  • Experience with scripting languages, e.g. Python for automation
  • RTL design, chip bring-up, and post-silicon validation experience
  • Ability to work in a dynamic environment with changing needs and requirements

ADDITIONAL REQUIREMENTS:

  • Ability to work extended hours and weekends as needed to meet critical milestones

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