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Senior Asic Verification Engineer Jobs (NOW HIRING)

NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the opportunity to have a real ...

We are now looking for a Senior Verification Engineer for our Memory Management Unit. NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This position offers ...

We are now looking for a Senior Verification Engineer for our Memory Management Unit. NVIDIA is seeking outstanding ASIC Verification Engineer to verify the world's leading GPUs. This position offers ...

We are now looking for a Senior ASIC Verification Engineer! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the world's leading GPU's, for deep learning, gaming ...

OR · Hybrid

The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is committed to deliver high-quality ...

The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is committed to deliver high-quality ...

NVIDIA is looking for a Senior ASIC Verification Engineer to help verify our global IP! This position offers an opportunity to impact an array of products while collaborating with teams from design ...

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Senior Asic Verification Engineer information

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$11K

$135.1K

$181.5K

How much do senior asic verification engineer jobs pay per year?

As of May 29, 2026, the average yearly pay for senior asic verification engineer in the United States is $135,084.00, according to ZipRecruiter salary data. Most workers in this role earn between $112,000.00 and $161,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior ASIC Verification Engineer, and why are they important?

To thrive as a Senior ASIC Verification Engineer, you need a strong background in digital design, verification methodologies, and hardware description languages like Verilog or VHDL, often supported by a degree in electrical engineering or a related field. Expertise with simulation tools (e.g., ModelSim, VCS), scripting languages (such as Python or Perl), and familiarity with UVM or SystemVerilog is typically required. Analytical thinking, problem-solving, and effective communication are critical soft skills for collaborating with design teams and debugging complex systems. These skills ensure the delivery of high-quality, reliable ASIC products by efficiently identifying and resolving design issues.

What are some common challenges faced by Senior ASIC Verification Engineers during complex chip projects?

Senior ASIC Verification Engineers often encounter challenges such as managing verification of increasingly complex designs, tight project timelines, and ensuring comprehensive test coverage. Coordinating with cross-functional teams, like design and software, is essential to resolve specification ambiguities and address integration issues early. Additionally, staying updated with evolving verification methodologies (like UVM or SystemVerilog) and toolchains is crucial for maintaining efficiency and delivering high-quality results.

What are Senior ASIC Verification Engineers?

Senior ASIC Verification Engineers are experienced professionals responsible for ensuring that Application-Specific Integrated Circuits (ASICs) function correctly before manufacturing. They design and implement testbenches, develop verification plans, and use simulation tools to verify the functionality and performance of ASIC designs. These engineers often work closely with design teams to identify and debug issues, ensuring the final chip meets all specifications and requirements. Their expertise helps reduce costly design errors and accelerates the development of reliable semiconductor products.
What cities are hiring for Senior Asic Verification Engineer jobs? Cities with the most Senior Asic Verification Engineer job openings:
What are the most commonly searched types of Asic Verification Engineer jobs? The most popular types of Asic Verification Engineer jobs are:
What states have the most Senior Asic Verification Engineer jobs? States with the most job openings for Senior Asic Verification Engineer jobs include:
Infographic showing various Senior Asic Verification Engineer job openings in the United States as of May 2026, with employment types broken down into 77% Part Time, and 23% Contract. Highlights an 100% Physical job distribution, with an average salary of $135,084 per year, or $64.9 per hour.
Senior ASIC Design Verification Engineer

Senior ASIC Design Verification Engineer

Ethernovia, Inc.

San Jose, CA

$200K - $300K/yr

Other

Medical, Dental, Vision

Posted 8 days ago


Job description

Senior ASIC Design Verification Engineer

Summary:  

  • As a Senior ASIC Verification Engineer, you will be responsible for all aspects of digital SoC verification.
  • You will work the architects, designers, and SW engineers to plan and execute verification and validation of advanced automotive communication semiconductors and systems.
  • You will contribute to a positive, trusting, and cohesive working environment based on integrity and strong work ethics.
  • This position is located in: San Jose, CA

Key Qualifications:

  • BS and/or MS in Electrical Engineering, Computer Science, or related field
  • Minimum 10+ years of ASIC verification experience
  • Strong understanding of ASIC verification fundamentals and industry standard methodologies
  • Experience with Verilog/System Verilog, UVM, Python, TCL, C/C++
  • Experience with the full verification flow, from spec to coverage analysis to gate level sim
  • Debugging failures in simulation to root cause problems
  • Self-motivated and able to work effectively both independently and in a team

Additional Success Factors:
Experience in any of the following areas:

  • Networking (Ethernet MAC, PHY, Switching, TCP/IP, security, PCIe and other industry standard protocols)
  • Video standards, protocols, processing
  • Digital signal processing filters
  • Third party IP (SerDes, controllers, processors, etc.)
  • Modular and Reusable Testbench architecture
  • Design for re-use of pre and post silicon tests and infrastructure
  • Automation of testbench creation, tests, regression, or EDA tools
  • Knowledge of SystemC and/or DPI

Personal Skills:

  • Excellent communication/documentation skills.
  • Attention to details.
  • Collaboration across multidisciplinary and international teams.

What You Can Expect from Ethernovia:

  • Technology depth and breadth expansion that can't be found in a large company
  • Opportunity to grow your career as the company grows
  • Pre IPO stock options
  • Cutting edge technology
  • World class team
  • Competitive base salary
  • Flexible hours
  • Medical, dental and vision insurance for employees

Salary Range:

  • The actual offered base salary for U.S. locations will vary depending on factors such as work location, individual qualifications, specializations, experience, skills, job-related knowledge, and internal equity. The annual salary range for this position is $200,000 - $300,000. The compensation package will also include incentive compensation in the form of pre-IPO ISO options, in addition to base salary and a full range of medical and other benefits.