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Remote Game Simulation Programming Jobs in Santa Clara, CA

Purple Hires Inc

Lead ASIC DFT Engineer

San Jose, CA · Remote

Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Below is the ... Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and ...

MatX

Emulation Engineer

Mountain View, CA · On-site +1

$175K - $450K/yr

Develop HW/SW co-emulation and co-simulation flows using RTL, software/reference models (Rust, C/C ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

2K

Senior Director, Online Services

San Mateo, CA · On-site +1

$227K - $337K/yr

WE ARE GAME MAKERS Who we are: We are a diverse team of developers driven by a passion for our art ... The position is for an existing vacancy. #LI-Remote #LI-Onsite #LI-Hybrid

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Remote Game Simulation Programming information

See Santa Clara, CA salary details

$12.9K

$79.4K

$142.7K

How much do remote game simulation programming jobs pay per year?

As of Aug 16, 2026, the average yearly pay for remote game simulation programming in Santa Clara, CA is $79,393.00, according to ZipRecruiter salary data. Most workers in this role earn between $51,700.00 and $93,400.00 per year, depending on experience, location, and employer.

What is the difference between Remote Game Simulation Programming vs Remote Game Development?

AspectRemote Game Simulation ProgrammingRemote Game Development
Primary FocusCreating realistic simulations and physics models for gamesDesigning, coding, and building complete games
Required SkillsProgramming, physics, mathematics, simulation techniquesProgramming, art, storytelling, game design
Work EnvironmentTypically specialized teams within gaming or simulation companiesBroader roles including design, programming, and art teams
Industry UsageUsed in training, research, and advanced gaming simulationsUsed in entertainment, mobile, console, and PC game markets

Remote Game Simulation Programming focuses on developing realistic physics and simulation models, often for training or research purposes. In contrast, Remote Game Development involves creating complete games, including design, art, and programming. Both roles require strong programming skills, but Simulation Programming emphasizes physics and mathematical modeling, while Game Development covers a broader range of skills related to game creation.

What are the key skills and qualifications needed to thrive as a remote game simulation programmer, and why are they important?

To thrive as a Remote Game Simulation Programmer, you need strong proficiency in programming languages such as C++ or Python, a solid understanding of game physics and computer graphics, and often a degree in computer science or a related field. Familiarity with game engines like Unity or Unreal Engine, version control systems (e.g., Git), and simulation frameworks is typically required. Excellent problem-solving abilities, self-motivation, and effective virtual communication skills set top performers apart in remote environments. These skills and qualities are crucial for developing realistic, efficient simulations and collaborating seamlessly with distributed game development teams.

What is remote game simulation programming?

Remote game simulation programming involves designing, developing, and testing game simulations from a location outside of a traditional office, often from home. Professionals in this role use programming languages and tools to create systems that mimic real-world or fictional scenarios within video games. They collaborate with other developers and designers online, ensuring the game’s physics, AI, and mechanics work as intended. This job requires strong coding skills, problem-solving abilities, and knowledge of game development frameworks.

What are some common challenges faced by remote game simulation programmers, and how can they be addressed?

Remote game simulation programmers often encounter challenges such as coordinating across time zones, maintaining effective communication with team members, and managing version control for complex simulation projects. To address these issues, it's important to use robust collaboration tools like Slack, Jira, and Git, and to establish clear documentation and code review processes. Regular virtual meetings and sync-ups help ensure alignment, while fostering a culture of open communication can minimize misunderstandings and keep projects on track.

What are popular job titles related to Remote Game Simulation Programming jobs in Santa Clara, CA?

For Remote Game Simulation Programming jobs in Santa Clara, CA, the most frequently searched job titles are:

What job categories do people searching Remote Game Simulation Programming jobs in Santa Clara, CA look for?

The top searched job categories for Remote Game Simulation Programming jobs in Santa Clara, CA are:

What cities near Santa Clara, CA are hiring for Remote Game Simulation Programming jobs?

Cities near Santa Clara, CA with the most Remote Game Simulation Programming job openings:

Remote Game Simulation Programming jobs near you
Infographic showing various Remote Game Simulation Programming job openings in Santa Clara, CA as of August 2026, with employment types broken down into 1% Internship, 79% Full Time, 14% Part Time, 1% Temporary, 4% Contract, and 1% Nights. Highlights an 88% Physical, 3% Hybrid, and 9% Remote job distribution, with an average salary of $79,393 per year, or $38.2 per hour.

Lead ASIC DFT Engineer

Purple Hires Inc

San Jose, CA • Remote

Contractor

Re-posted yesterday

Job description

Title - Lead ASIC DFT Engineer

Location – Remote (must be aligned with PST time zone)

 
Below is the detailed job description for your reference -
 

Job Description: 

Experience

10+ years of hands-on experience in ASIC Design-for-Test (DFT)

Role Summary

We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC designs. This role requires deep technical ownership across DFT architecture, scan insertion, ATPG, MBIST/LBIST, JTAG, boundary scan, and post-silicon validation, along with the ability to lead cross-functional debug efforts and drive resolution of critical silicon issues.

The ideal candidate will have strong hands-on expertise in DFT fundamentals, fault models, test coverage, diagnosis, and debug, as well as the ability to evaluate and adopt emerging DFT methodologies and architecture schemes to improve robustness, quality, and yield.

Key Responsibilities

  • Lead DFT architecture, implementation, verification, and sign-off for complex ASIC and SoC designs.
  • Drive scan architecture, scan insertion, scan chain stitching, and scan compression workflows to achieve high coverage and robust testability.
  • Own MBIST/LBIST integration, implementation, verification, and debug across design and silicon bring-up phases.
  • Perform DFT debug, failure analysis, root-cause investigation, and fault coverage closure for complex silicon issues.
  • Develop and validate DFT constraints, including DFT SDC, timing checks, and DFT-specific timing analysis.
  • Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to resolve integration and implementation issues.
  • Support ATPG pattern generation, ATPG simulations, DRC analysis, test coverage analysis, and diagnosis/debug.
  • Work on JTAG, boundary scan, iJTAG, SSN, and IP-level DFT integration.
  • Review RTL, synthesis, LEC, and physical design impacts on DFT implementation and test quality.
  • Act as a technical escalation point for advanced DFT and post-silicon debug issues.
  • Mentor junior and mid-level DFT engineers and promote best practices in DFT methodology and automation.
  • Develop scripts and automation using TCL, PERL, or Python to improve flow efficiency and debug productivity.

Required Skills & Qualifications

  • Strong hands-on experience in ASIC DFT with end-to-end ownership.
  • Solid understanding of DFT fundamentals, fault models, test techniques, and test coverage concepts.
  • Deep expertise in scan architecture, ATPG, MBIST, LBIST, JTAG, boundary scan, and silicon debug.
  • Hands-on experience with Synopsys, Cadence, and Siemens/Mentor EDA tools.
  • Proven experience in scan insertion, ATPG setup, simulation, debug, and DRC analysis.
  • Experience with MBIST implementation and verification; SMS experience preferred.
  • Experience with scan architecture and scan chain stitching; Tessent/SSN experience preferred.
  • Strong understanding of PLLs, RTL design, synthesis flows, logical equivalence checking (LEC), and physical design implementation.
  • Proven post-silicon debug and silicon bring-up experience.
  • Exposure to large SoC designs, hierarchical DFT flows, and multi-domain integration challenges.
  • Strong communication skills and the ability to work independently with minimal ramp-up.

Preferred Experience

  • MBIST post-silicon validation.
  • ATPG simulations and fault coverage debug.
  • DFT RTL, DFD, DFT verification, and IP-level DFT integration.
  • DFT SDC creation and DFT timing closure support.
  • Boundary scan, iJTAG, SSN, and design-for-debug methodologies.
  • TCL/PERL scripting for DFT automation, reporting, and debug.
  • Experience working across multiple ASIC technology nodes and complex product development cycles.
  • Familiarity with yield learning, diagnosis, and manufacturing test optimization.