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Remote Asic Rtl Design Engineer Jobs in Hawthorne, CA

Collaborate with substrate layout, ASIC design, and manufacturing engineers. * Create mechanical drawings for substrate fabrication and packaged part assembly. Work with vendors for components ...

... require design, engineering, permitting, construction and/or operations support. You can be hybrid out of our San Diego, Long Beach, Pleasanton, or Sacramento office. Remote work might also be ...

Architect and implement IP-based network design and traffic engineering solutions for live broadcast events, remote productions, and studio workflows. * Design EVPN-VXLAN overlays for scalable ...

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Remote Asic Rtl Design Engineer information

See Hawthorne, CA salary details

$95.6K

$152.7K

$205.4K

How much do remote asic rtl design engineer jobs pay per year?

As of Jul 15, 2026, the average yearly pay for remote asic rtl design engineer in Hawthorne, CA is $152,699.00, according to ZipRecruiter salary data. Most workers in this role earn between $133,700.00 and $183,000.00 per year, depending on experience, location, and employer.

What is a Remote ASIC RTL Design Engineer?

A Remote ASIC RTL Design Engineer is a professional who specializes in designing the Register Transfer Level (RTL) code for Application-Specific Integrated Circuits (ASICs) while working remotely. Their main responsibilities include creating and verifying digital circuit designs using hardware description languages such as Verilog or VHDL. These engineers collaborate with hardware teams to ensure functionality, performance, and power requirements are met, all while operating from a location outside of a traditional office setting. They often use remote collaboration tools and simulation software to review and validate designs before fabrication.

What are the key skills and qualifications needed to thrive as a Remote ASIC RTL Design Engineer, and why are they important?

To thrive as a Remote ASIC RTL Design Engineer, you need a solid background in digital design, computer engineering, and hardware description languages like Verilog or VHDL, often supported by a relevant degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as experience with simulation, synthesis, and version control systems, is crucial. Strong problem-solving, self-motivation, and effective remote communication skills distinguish top performers in this role. These skills ensure accurate, efficient design cycles and effective collaboration across distributed teams, leading to successful chip delivery.

What is the difference between Remote Asic Rtl Design Engineer vs Remote Digital IC Design Engineer?

AspectRemote Asic Rtl Design EngineerRemote Digital IC Design Engineer
Primary FocusRegister Transfer Level (RTL) design for ASICsDigital integrated circuit design at the IC level
Skills & CertificationsHDL (Verilog/VHDL), EDA tools, verificationHDL, circuit simulation, verification, FPGA experience
Work EnvironmentASIC design teams, hardware developmentIC design teams, semiconductor industry
Industry UsageUsed in ASIC development for various applicationsUsed in digital IC manufacturing and prototyping

Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.

What are some common challenges faced by Remote ASIC RTL Design Engineers, and how can they be addressed?

Remote ASIC RTL Design Engineers often face challenges such as coordinating with distributed teams across different time zones and ensuring effective communication during complex design phases. To address these issues, it’s important to establish clear documentation practices, utilize collaboration tools like version control and video conferencing, and schedule regular check-ins with team members. Additionally, staying proactive in seeking feedback and clarifying design specifications helps ensure alignment and reduces misunderstandings. Building strong virtual relationships with verification and backend teams can also streamline the handoff process and overall project flow.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Hawthorne, CA? The most popular types of Asic Rtl Design Engineer jobs in Hawthorne, CA are:
What job categories do people searching Remote Asic Rtl Design Engineer jobs in Hawthorne, CA look for? The top searched job categories for Remote Asic Rtl Design Engineer jobs in Hawthorne, CA are:
What cities near Hawthorne, CA are hiring for Remote Asic Rtl Design Engineer jobs? Cities near Hawthorne, CA with the most Remote Asic Rtl Design Engineer job openings:

Electromechanical Packaging Engineer

Claros

Torrance, CA • On-site, Remote

$150K - $200K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 15 days ago


Job description

Claros is a power management solutions company that is innovating at the intersection of power and compute to make AI more sustainable and widely available. By driving down the cost and complexity of power delivery and leveraging innovative hardware and software, the company seeks to decrease energy consumption, optimize power delivery, increase compute performance, and maximize the efficiency of AI operations.
About The Team
We are open-minded, fast paced, problem solvers that value open dialogue and candor. Our passion is to challenge the status-quo and we embrace transformational thinking. Our response is never "no, but...." instead "yes, if....". We are mindful of our personal and organizational blinders and try to build an environment where our team members are At Their Best.
What You Will Do
The Electromechanical Packaging Engineer will be working with a Lead Engineer and be responsible for:
  • Support chip scale packaging design and HDI organic substrate layout for integrated voltage regulator product line.
  • Collaborate with substrate layout, ASIC design, and manufacturing engineers.
  • Create mechanical drawings for substrate fabrication and packaged part assembly. Work with vendors for components, assembly, and test.

What You Bring
  • Minimum BS in Mechanical or Electrical engineering, MS or higher-level degree preferred.
  • 5+ years' experience with microelectronics packaging, and/or PCB design
  • Knowledge of foundry processes and chip scale assembly processes
  • Understanding of how electrical design requirements impact substrate layout and interconnect selection
  • Proficient with 3D mechanical CAD software (Creo, NX, Catia, etc.), generating mechanical drawings, and GD&T
  • Ability to read and create electrical schematics
  • Familiarity with tape out processes for wafers and substrate
  • Basic understanding of Form, Fit, Function elements in design for manufacturability (DFM).
  • willingness to learn new concepts and techniques and concepts
  • Familiarity with PCB design tools (Altium, Cadence, Mentor, etc.) is a plus
  • Basic understanding of component level thermal analysis is a plus
  • Willingness to be in the office in Torrance, CA a minimum of 3 days per week

What We Offer
  • Career track opportunity with potential for rapid advancement with strong performance as the firm grows
  • 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
  • Paid maternity and paternity for 14 weeks at employees' normal pay.
  • Unlimited PTO, with management approval.
  • Opportunities for professional development and continued learning.
  • Optional 401K, FSA, and equity incentives available.

Salary Range: $150,000 - $200,000. This represents the typical salary range for this position based on experience, skills, and other factors.
Our Red Cell Partners Benefits:
  • Career track opportunity with potential for rapid advancement with strong performance as the firm grows
  • 100% employer paid, comprehensive health care including medical, dental, and vision for you and your family.
  • Paid maternity and paternity for 14 weeks at employees' normal pay.
  • Unlimited PTO, with management approval.
  • Opportunities for professional development and continued learning.
  • Optional 401K, FSA, and equity incentives available.

Applicant Data Disclosure
By submitting an application, you acknowledge that Red Cell Partners, LLC ("Red Cell") uses third-party service providers to facilitate its recruitment and hiring processes. These providers include applicant tracking systems, candidate verification platforms, and fraud detection tools (collectively, "Hiring Platforms"). Your application materials, including your résumé, cover letter, work samples, responses to application questions, and any other information you submit, may be transmitted to and processed by these Hiring Platforms for the following purposes:
  • Managing and administering your application throughout the hiring process;
  • Verifying the accuracy and authenticity of application materials, including by cross-referencing information you provide against publicly available sources and proprietary databases;
  • Identifying indicators of potentially fraudulent, fabricated, or materially misleading application content, including but not limited to discrepancies between submitted materials and publicly available professional profiles, geographic anomalies, and fabricated work histories.

Applications that are flagged through this process as containing indicators of fraud or material misrepresentation may be declined from further consideration. If you have questions about the status of your application or the evaluation process, please contact talent@redcellpartners.com.
Red Cell requires its Hiring Platform providers to process your information solely for the purposes described above and in accordance with applicable law. Your information will be retained only for as long as necessary to fulfill these purposes and any applicable legal obligations, after which it will be deleted in accordance with Red Cell's data retention policies.
For more information about how your data is used, please refer to our Privacy Policy and Applicant Privacy Notice.