... remote roles. Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure ...
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... remote roles. Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure ...
Quick apply
... remote roles. Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure ...
San Jose, CA · On-site +1
... remote roles. Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure ...
San Jose, CA · On-site +1
... remote roles. Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure ...
San Jose, CA · Remote
$55 - $60/hr
Remote Job Type: Contract We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital ...
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San Jose, CA · Remote
$55 - $60/hr
Remote Job Type: Contract We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital ...
Santa Clara, CA · On-site +1
Your responsibilities will include architecture and micro-architecture design, RTL design and ... Strong interpersonal skills and ability to work with on-site and remote teams NVIDIA is widely ...
Santa Clara, CA · On-site +1
Your responsibilities will include architecture and micro-architecture design, RTL design and ... Strong interpersonal skills and ability to work with on-site and remote teams NVIDIA is widely ...
San Jose, CA · On-site +1
$192K/yr
Role: Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote, PST time zone preferred ... Strong understanding of PLLs, RTL design, synthesis, LEC, and physical design flows * Post-silicon ...
San Jose, CA · On-site +1
$192K/yr
Role: Lead ASIC DFT Engineer Location: San Jose, CA Work Setup: Remote, PST time zone preferred ... Strong understanding of PLLs, RTL design, synthesis, LEC, and physical design flows * Post-silicon ...
San Jose, CA · Remote
Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Below is the ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...
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San Jose, CA · Remote
Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Below is the ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...
Los Altos, CA · On-site +1
$200K - $300K/yr
SoC Microarchitecture, RTL Design, IP Integration (UCIe, DDR, CPU/GPU/NPU), ARM Cores, Memory ... ASIC design house through the process. As our Lead SoC Design Engineer, you will develop the ...
New
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Los Altos, CA · On-site +1
$200K - $300K/yr
SoC Microarchitecture, RTL Design, IP Integration (UCIe, DDR, CPU/GPU/NPU), ARM Cores, Memory ... ASIC design house through the process. As our Lead SoC Design Engineer, you will develop the ...
New
Senior ASIC DFT CDC Constraints Engineer Location: Milpitas, CA - Remote Contract Term: Contract ... Design & implement robust and reusable RTL with CDC/RDC considerations * Spec comprehensive CDC/RDC ...
Senior ASIC DFT CDC Constraints Engineer Location: Milpitas, CA - Remote Contract Term: Contract ... Design & implement robust and reusable RTL with CDC/RDC considerations * Spec comprehensive CDC/RDC ...
Mountain View, CA · On-site +1
$175K - $362K/yr
Develop, maintain, and continuously improve MatX's Physical Design flow, from RTL to GDSII flow ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $362K/yr
Develop, maintain, and continuously improve MatX's Physical Design flow, from RTL to GDSII flow ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $362K/yr
... RTL to GDSII * Own entire subsystems or subsets and/or chip-level Physical Design deliverables ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $362K/yr
... RTL to GDSII * Own entire subsystems or subsets and/or chip-level Physical Design deliverables ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Santa Clara, CA · Remote
$160K - $240K/yr
... in ASIC/SoC micro-architecture and RTL design * Strong expertise in Verilog/SystemVerilog ... Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry ...
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Santa Clara, CA · Remote
$160K - $240K/yr
... in ASIC/SoC micro-architecture and RTL design * Strong expertise in Verilog/SystemVerilog ... Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry ...
San Jose, CA · On-site +1
$159K - $164K/yr
Title: Physical Design Engineer Location: 100% Remote Duration: Long Term Contract role ... Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Minimum ...
San Jose, CA · On-site +1
$159K - $164K/yr
Title: Physical Design Engineer Location: 100% Remote Duration: Long Term Contract role ... Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Minimum ...
... design decisions and ramp up on verification of these blocks Serve as an individual contributor to ... RTL code (SystemVerilog, Verilog, VHDL) Experience with revision control systems and CI/CD ...
... design decisions and ramp up on verification of these blocks Serve as an individual contributor to ... RTL code (SystemVerilog, Verilog, VHDL) Experience with revision control systems and CI/CD ...
... architectural/design decisions and ramp up on verification of these blocks • Serve as an ... RTL code (SystemVerilog, Verilog, VHDL) • Experience with revision control systems and CI/CD ...
... architectural/design decisions and ramp up on verification of these blocks • Serve as an ... RTL code (SystemVerilog, Verilog, VHDL) • Experience with revision control systems and CI/CD ...
San Jose, CA · Remote
$120/hr
Requirements: - BS, MS or PhD degree or equivalent in Computer Science, Electrical Engineering or related majors. - Knowledge/experience on RTL design, Verilog. - Good problem solving, root causing ...
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San Jose, CA · Remote
$120/hr
Requirements: - BS, MS or PhD degree or equivalent in Computer Science, Electrical Engineering or related majors. - Knowledge/experience on RTL design, Verilog. - Good problem solving, root causing ...
Mountain View, CA · On-site +1
$175K - $362K/yr
Prior hardware design experience - ASIC or FPGA. If you already understand clock domains ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · On-site +1
$175K - $362K/yr
Prior hardware design experience - ASIC or FPGA. If you already understand clock domains ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Sunnyvale, CA · On-site +1
Work closely with external engineering partners, ASIC design engineers, ASIC design verification ... Strong Verilog programming skills, and experience with RTL verification, and performance modeling.
Sunnyvale, CA · On-site +1
Work closely with external engineering partners, ASIC design engineers, ASIC design verification ... Strong Verilog programming skills, and experience with RTL verification, and performance modeling.
Menlo Park, CA · Remote
We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...
Menlo Park, CA · Remote
We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...
Menlo Park, CA · On-site +1
$160K - $250K/yr
We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...
Menlo Park, CA · On-site +1
$160K - $250K/yr
We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...
Mountain View, CA · Remote
$175K - $450K/yr
... SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
Mountain View, CA · Remote
$175K - $450K/yr
... SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...
$110.3K - $121.8K
16% of jobs
$121.8K - $133.3K
3% of jobs
$133.3K - $144.8K
4% of jobs
$148.2K is the 25th percentile. Wages below this are outliers.
$144.8K - $156.3K
6% of jobs
The median wage is $163.6K / yr.
$156.3K - $167.8K
33% of jobs
$167.8K - $179.4K
3% of jobs
$179.4K - $190.9K
2% of jobs
$198.5K is the 75th percentile. Wages above this are outliers.
$190.9K - $202.4K
12% of jobs
$202.4K - $213.9K
5% of jobs
$213.9K - $225.4K
4% of jobs
$225.4K - $236.9K
12% of jobs
$110.3K
$176.2K
$236.9K
| Aspect | Remote Asic Rtl Design Engineer | Remote Digital IC Design Engineer |
|---|---|---|
| Primary Focus | Register Transfer Level (RTL) design for ASICs | Digital integrated circuit design at the IC level |
| Skills & Certifications | HDL (Verilog/VHDL), EDA tools, verification | HDL, circuit simulation, verification, FPGA experience |
| Work Environment | ASIC design teams, hardware development | IC design teams, semiconductor industry |
| Industry Usage | Used in ASIC development for various applications | Used in digital IC manufacturing and prototyping |
Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.
Full-time
Medical, Dental, Vision, Life, Retirement, PTO
Posted 7 days ago
At Cornelis were building the future of AI and HPC networking with an AI-first approach to silicon and software development. Were seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.
At Cornelis were building the future of AI and HPC networking with an AI-first approach to silicon and software development. Were seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.
Cornelis Networks delivers the worlds highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the worlds most demanding computational challenges with our next-generation networking solutions.
We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.
Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure toexecutive leadership,this leaderwillmanagea team of talented design engineers anddrivefull-lifecycle development ofCornelisnext-generation, high-performance networking ASICs.The role isaccountable forbuilding and driving RTLimplementationschedules acrossallSoC subsystemsand full-chipmilestones. Successrequiresdeep hands-onexpertisein advanced RTL designimplementation,methodologies,and SoC flows,from microarchitecturedefinitionthroughRTL delivery,tape-outreadiness, andcross-functionalexecutionwith Architecture, DesignVerification, Emulation,andPhysical Design.This leaderwill alsoownheadcount planning,hiring,and organizationalstrategyto build animble, efficient,world-classdesign team.Exposureto AI-based design flowsandmethodologyispreferred.
This role isintendedfor a senior engineering leader who can combine hands-on ASIC RTL designexpertisewith disciplined program execution, cross-functional coordination, andteam buildingat scale.
Key Responsibilities
MinimumQualifications
Preferred Qualifications
Location:This is a remote position for employees residing within the United States.
We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.
At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.
In addition to your base pay, youll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.
Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.
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Software development
51 - 200 Employees
Wayne, PA, US
2019