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Remote Asic Rtl Design Engineer Jobs in Livermore, CA

Your responsibilities will include architecture and micro-architecture design, RTL design and ... Strong interpersonal skills and ability to work with on-site and remote teams NVIDIA is widely ...

Title - Lead ASIC DFT Engineer Location - Remote (must be aligned with PST time zone) Below is the ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

ASIC/SOC CAD Engineer

Mountain View, CA · On-site +1

$175K - $362K/yr

Develop, maintain, and continuously improve MatX's Physical Design flow, from RTL to GDSII flow ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

... in ASIC/SoC micro-architecture and RTL design * Strong expertise in Verilog/SystemVerilog ... Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry ...

Requirements: - BS, MS or PhD degree or equivalent in Computer Science, Electrical Engineering or related majors. - Knowledge/experience on RTL design, Verilog. - Good problem solving, root causing ...

Bluespec Design Engineer

Mountain View, CA · On-site +1

$175K - $362K/yr

Prior hardware design experience - ASIC or FPGA. If you already understand clock domains ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

Work closely with external engineering partners, ASIC design engineers, ASIC design verification ... Strong Verilog programming skills, and experience with RTL verification, and performance modeling.

We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...

MMIC Design Engineer

Menlo Park, CA · On-site +1

$160K - $250K/yr

We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...

... SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

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Remote Asic Rtl Design Engineer information

See Livermore, CA salary details

$110.3K

$176.2K

$236.9K

How much do remote asic rtl design engineer jobs pay per year?

As of Jul 15, 2026, the average yearly pay for remote asic rtl design engineer in Livermore, CA is $176,177.00, according to ZipRecruiter salary data. Most workers in this role earn between $154,200.00 and $211,100.00 per year, depending on experience, location, and employer.

What is a Remote ASIC RTL Design Engineer?

A Remote ASIC RTL Design Engineer is a professional who specializes in designing the Register Transfer Level (RTL) code for Application-Specific Integrated Circuits (ASICs) while working remotely. Their main responsibilities include creating and verifying digital circuit designs using hardware description languages such as Verilog or VHDL. These engineers collaborate with hardware teams to ensure functionality, performance, and power requirements are met, all while operating from a location outside of a traditional office setting. They often use remote collaboration tools and simulation software to review and validate designs before fabrication.

What are the key skills and qualifications needed to thrive as a Remote ASIC RTL Design Engineer, and why are they important?

To thrive as a Remote ASIC RTL Design Engineer, you need a solid background in digital design, computer engineering, and hardware description languages like Verilog or VHDL, often supported by a relevant degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as experience with simulation, synthesis, and version control systems, is crucial. Strong problem-solving, self-motivation, and effective remote communication skills distinguish top performers in this role. These skills ensure accurate, efficient design cycles and effective collaboration across distributed teams, leading to successful chip delivery.

What is the difference between Remote Asic Rtl Design Engineer vs Remote Digital IC Design Engineer?

AspectRemote Asic Rtl Design EngineerRemote Digital IC Design Engineer
Primary FocusRegister Transfer Level (RTL) design for ASICsDigital integrated circuit design at the IC level
Skills & CertificationsHDL (Verilog/VHDL), EDA tools, verificationHDL, circuit simulation, verification, FPGA experience
Work EnvironmentASIC design teams, hardware developmentIC design teams, semiconductor industry
Industry UsageUsed in ASIC development for various applicationsUsed in digital IC manufacturing and prototyping

Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.

What are some common challenges faced by Remote ASIC RTL Design Engineers, and how can they be addressed?

Remote ASIC RTL Design Engineers often face challenges such as coordinating with distributed teams across different time zones and ensuring effective communication during complex design phases. To address these issues, it’s important to establish clear documentation practices, utilize collaboration tools like version control and video conferencing, and schedule regular check-ins with team members. Additionally, staying proactive in seeking feedback and clarifying design specifications helps ensure alignment and reduces misunderstandings. Building strong virtual relationships with verification and backend teams can also streamline the handoff process and overall project flow.
What are popular job titles related to Remote Asic Rtl Design Engineer jobs in Livermore, CA? For Remote Asic Rtl Design Engineer jobs in Livermore, CA, the most frequently searched job titles are:
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Senior Manager, ASIC Design Engineering

Senior Manager, ASIC Design Engineering

Cornelis Networks, Inc.

San Jose, CA • Remote

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 7 days ago


Job description

Salary:

At Cornelis were building the future of AI and HPC networking with an AI-first approach to silicon and software development. Were seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.


At Cornelis were building the future of AI and HPC networking with an AI-first approach to silicon and software development. Were seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale.


Cornelis Networks delivers the worlds highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the worlds most demanding computational challenges with our next-generation networking solutions.


We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles.


Cornelis Networks islooking for aSenior ASIC Design Engineering Managerto lead and grow our RTL design engineering team.Reporting to the VP of ASIC Engineering,with direct exposure toexecutive leadership,this leaderwillmanagea team of talented design engineers anddrivefull-lifecycle development ofCornelisnext-generation, high-performance networking ASICs.The role isaccountable forbuilding and driving RTLimplementationschedules acrossallSoC subsystemsand full-chipmilestones. Successrequiresdeep hands-onexpertisein advanced RTL designimplementation,methodologies,and SoC flows,from microarchitecturedefinitionthroughRTL delivery,tape-outreadiness, andcross-functionalexecutionwith Architecture, DesignVerification, Emulation,andPhysical Design.This leaderwill alsoownheadcount planning,hiring,and organizationalstrategyto build animble, efficient,world-classdesign team.Exposureto AI-based design flowsandmethodologyispreferred.


This role isintendedfor a senior engineering leader who can combine hands-on ASIC RTL designexpertisewith disciplined program execution, cross-functional coordination, andteam buildingat scale.


Key Responsibilities

  • OwnASIC RTL delivery schedules across major milestonesbytracking,monitoring,and reportingprogress against committedplans.
  • Utilize data-driven insights to predictschedulerisks and proactively reallocate human resources to keep the project on track.
  • AlignRTL delivery scheduleswith DV andemulationenablement andmanagefeedbackloopsand dependencies efficiently.
  • Facilitatephysical designhandoffsbyensuringdesign teams provide high-quality RTL and constraintsthatminimize timing-closure iterations. Track physical design feedback anddelivery schedules to support physical designsignoff and tape-out milestones.
  • Leadlong-term headcount planning and organizationaldesignfor the ASIC department.Identifyskill gaps and executeglobal talent acquisition strategiesthat support theproduct roadmap.

MinimumQualifications

  • 15+ years in the semiconductor industry,preferably inhigh performancedesigns on advanced technology nodes,with at least5years in people management
  • B.S. or M.S. in Computer Engineering, Electrical Engineering, or related technical field, or equivalent practical experience
  • Deep understanding of the interaction between Design, Verification, Emulation, and Physical Design teams. You must know "how the work gets done" to manage the people doing it.
  • Proven ability to lead largeengineering organizations through multiple full-cycle ASIC product launchesin a remoteenvironment.Ability to coordinate across multiple projects, manage risks and escalations, and work under tight schedules and budget constraints.
  • Strong technicalexpertisein microarchitecture development, RTL coding (Verilog/SystemVerilog), synthesis, STA/timing closure, physical design, and verification methodologies.
  • Exposuretoone or more industry standards/protocol stacks such as PCIe, Ethernet, UCIe,UALink.
  • Demonstrated ability tooptimizedesigns for PPA (power, performance, area) and to integrate major subsystems (interconnect, I/O, memory).


Preferred Qualifications

  • Exposure to AI based design implementation and verification flows, scripting for automation, milestonetrackingand flow integration
  • Experience building globally distributed ASIC design teams and scaling engineering practicesin a remote environment.


Location:This is a remote position for employees residing within the United States.


We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry.


At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives.


In addition to your base pay, youll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave.


Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants needs under the respective laws throughout all stages of the recruitment and selection process.