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Remote Asic Rtl Design Engineer Jobs in Livermore, CA

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for ...

Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources ... We are seeking a Package Mechanical Design Engineer to join the Cisco ASIC Group. In this role, you ...

Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources ... We are seeking a Package Mechanical Design Engineer to join the Cisco ASIC Group. In this role, you ...

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

STA Engineer Remote or San Jose, CA * STA setup, convergence, reviews, and sign-off for multi-mode ... Familiar with digital flow design implementation RTL to GDS: ICC, Innovous, PT/Tempus * Familiar ...

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

Integrate robotic and remote handling technologies (e.g., manipulators, cameras, cranes, etc.) into ... We are looking for a Hot Cell Design Engineer that is: * Passionate about clean energy, fuel ...

Emulation Engineer

Mountain View, CA · On-site +1

$175K - $450K/yr

Deep RTL design expertise is not required. * Strong software and automation skills - Python plus ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

US - Remote Job Title: Core Engineering - Design Engineer V PCB Layout Engineer, AR Product Team As a PCB Layout Engineer on Meta's AR Product Team, you will be responsible for driving world-class ...

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Remote Asic Rtl Design Engineer information

See Livermore, CA salary details

$110.3K

$176.2K

$236.9K

How much do remote asic rtl design engineer jobs pay per year?

As of Jul 19, 2026, the average yearly pay for remote asic rtl design engineer in Livermore, CA is $176,177.00, according to ZipRecruiter salary data. Most workers in this role earn between $154,200.00 and $211,100.00 per year, depending on experience, location, and employer.

What is a Remote ASIC RTL Design Engineer?

A Remote ASIC RTL Design Engineer is a professional who specializes in designing the Register Transfer Level (RTL) code for Application-Specific Integrated Circuits (ASICs) while working remotely. Their main responsibilities include creating and verifying digital circuit designs using hardware description languages such as Verilog or VHDL. These engineers collaborate with hardware teams to ensure functionality, performance, and power requirements are met, all while operating from a location outside of a traditional office setting. They often use remote collaboration tools and simulation software to review and validate designs before fabrication.

What are the key skills and qualifications needed to thrive as a Remote ASIC RTL Design Engineer, and why are they important?

To thrive as a Remote ASIC RTL Design Engineer, you need a solid background in digital design, computer engineering, and hardware description languages like Verilog or VHDL, often supported by a relevant degree. Proficiency with industry-standard EDA tools such as Synopsys, Cadence, or Mentor Graphics, as well as experience with simulation, synthesis, and version control systems, is crucial. Strong problem-solving, self-motivation, and effective remote communication skills distinguish top performers in this role. These skills ensure accurate, efficient design cycles and effective collaboration across distributed teams, leading to successful chip delivery.

What is the difference between Remote Asic Rtl Design Engineer vs Remote Digital IC Design Engineer?

AspectRemote Asic Rtl Design EngineerRemote Digital IC Design Engineer
Primary FocusRegister Transfer Level (RTL) design for ASICsDigital integrated circuit design at the IC level
Skills & CertificationsHDL (Verilog/VHDL), EDA tools, verificationHDL, circuit simulation, verification, FPGA experience
Work EnvironmentASIC design teams, hardware developmentIC design teams, semiconductor industry
Industry UsageUsed in ASIC development for various applicationsUsed in digital IC manufacturing and prototyping

Both roles involve digital design and HDL skills, but the Remote Asic Rtl Design Engineer focuses on RTL coding for ASICs, while the Remote Digital IC Design Engineer covers broader digital IC design, including FPGA and chip-level work. They share similar credentials and work environments, often overlapping in semiconductor companies.

What are some common challenges faced by Remote ASIC RTL Design Engineers, and how can they be addressed?

Remote ASIC RTL Design Engineers often face challenges such as coordinating with distributed teams across different time zones and ensuring effective communication during complex design phases. To address these issues, it’s important to establish clear documentation practices, utilize collaboration tools like version control and video conferencing, and schedule regular check-ins with team members. Additionally, staying proactive in seeking feedback and clarifying design specifications helps ensure alignment and reduces misunderstandings. Building strong virtual relationships with verification and backend teams can also streamline the handoff process and overall project flow.
What are popular job titles related to Remote Asic Rtl Design Engineer jobs in Livermore, CA? For Remote Asic Rtl Design Engineer jobs in Livermore, CA, the most frequently searched job titles are:
What job categories do people searching Remote Asic Rtl Design Engineer jobs in Livermore, CA look for? The top searched job categories for Remote Asic Rtl Design Engineer jobs in Livermore, CA are:
What cities near Livermore, CA are hiring for Remote Asic Rtl Design Engineer jobs? Cities near Livermore, CA with the most Remote Asic Rtl Design Engineer job openings:
ASIC Engineer, Design Verification

ASIC Engineer, Design Verification

Meta

Sunnyvale, CA • On-site, Remote

$146K/yr

Full-time

Posted 16 days ago


Meta rating

7.5

Company rating: 7.5 out of 10

Based on 44 frontline employees who took The Breakroom Quiz

135th of 209 rated software companies


Job description

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of an agile team working with experienced engineers across the industry, focused on developing ASIC solutions for Meta’s data center applications. You will be responsible for the verification closure of a design module or sub-system from test-planning, UVM based test bench development to verification closure. Along with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design, Emulation and Post-Silicon teams towards creating a first-pass silicon success.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
  • Develop functional tests based on verification test plan
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Debug, root-cause and resolve functional failures in the design, partnering with the Design team
  • Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring design quality meets defined verification and coverage goals
  • Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 6+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification
  • 6+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments

Preferred Qualifications:
  • Experience working across and building relationships with cross-functional design, model and emulation teams
  • Experience with revision control systems like Mercurial(Hg), Git or SVN
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
  • Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs
  • Track record of 'first-pass success' in ASIC development cycles
  • Experience with micro-architectural performance verification
  • Experience verifying GPU/CPU designs
  • Experience with verification of ARM/RISC-V based sub-systems or SoCs
  • Experience in development of UVM based verification environments from scratch
  • Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet
  • Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$146,000/year to $209,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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