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Remote Asic Design Engineer Jobs (NOW HIRING)

Navtech, Inc.

Digital Design Engineer.

$139K/yr

REMOTE Duration : 6+ Months on W2 Visa : Independent candidates who are eligible to work for any ... Role responsibilities (including, but not limited to): • Own an ASIC IP RTL implementation for IP ...

IC Enable

RTL Design Engineer

Richardson, TX · On-site +1

$122K/yr

... ASIC/SoC development flows, and the ability to collaborate across design, verification, analog ... Richardson, TX (Hybrid, Remote considered based on experience and qualifications) What You'll Do:

K2 Space

Principal ASIC Physical Design Engineer

OR · On-site +1

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

Weekday AI

ASIC/SoC Design & Verification Engineer

$70 - $100/hr

We are seeking experienced ASIC and SoC Design & Verification Engineers to contribute their ... This is a fully remote, part-time engagement requiring approximately 20-40 hours per week ...

K2 Space

Principal ASIC Physical Design Engineer

$190K - $280K/yr

The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...

Purple Hires Inc

ASIC DFT Engineer

Plano, TX · Remote

Remote, (Onsite) Duration: Contract Year of Exp: 8+ yrs to 15 yrs. We are seeking a highly ... Collaborate with RTL design, verification, physical design, STA, and silicon validation teams to ...

Nvidia

Track advances in AI, EDA, and hardware design research, evaluating their applicability and guiding ... High-level programming skills including experience with Python, PERL, Make, and shell scripting.

AttoTude

MMIC Design Engineer

Menlo Park, CA · On-site +1

$160K - $250K/yr

We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...

AttoTude

MMIC Design Engineer

Menlo Park, CA · On-site +1

We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role ... Understanding tradeoff at the device level for high performance ASIC implementation * Ability to ...

Sapsol Technologies Inc

Asics Engineer

... in ASIC Design-for-Test (DFT) Role Summary We are seeking a highly experienced Lead ASIC DFT Engineer to architect, implement, verify, and debug advanced DFT solutions for complex ASIC and SoC ...

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Remote Asic Design Engineer information

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$94K

$150.2K

$202K

How much do remote asic design engineer jobs pay per year?

As of Aug 20, 2026, the average yearly pay for remote asic design engineer in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is a remote ASIC design engineer?

A Remote ASIC Design Engineer is a professional who designs Application-Specific Integrated Circuits (ASICs) while working remotely, often from home or another location outside of a traditional office. They are responsible for creating and verifying digital or analog circuit designs tailored to specific applications, such as telecommunications, automotive, or consumer electronics. These engineers use specialized hardware description languages (HDLs) like Verilog or VHDL and collaborate with teams using online tools for simulation, synthesis, and verification. Remote ASIC Design Engineers must have strong technical skills and the ability to communicate and coordinate effectively in a virtual work environment.

What are the key skills and qualifications needed to thrive as a remote ASIC design engineer?

To thrive as a Remote ASIC Design Engineer, you need a solid background in digital circuit design, Verilog or VHDL programming, and a degree in electrical or computer engineering. Familiarity with EDA tools like Synopsys, Cadence, or Mentor Graphics, as well as experience in simulation, synthesis, and verification processes, is typically required. Strong problem-solving skills, effective communication, and the ability to collaborate virtually are standout soft skills for remote success. These competencies ensure efficient design cycles, high-quality deliverables, and seamless teamwork in distributed engineering environments.

What are some common challenges faced by remote ASIC design engineers, and how can they be effectively managed?

Remote ASIC Design Engineers often encounter challenges such as coordinating across multiple time zones, ensuring effective communication with hardware and verification teams, and maintaining access to high-performance computing resources. To overcome these hurdles, it’s essential to use collaborative project management tools, establish clear communication protocols, and schedule regular sync meetings. Additionally, many companies provide secure remote access to lab resources and simulation tools, helping engineers stay productive and connected with their teams.

What is the difference between Remote Asic Design Engineer vs Remote FPGA Design Engineer?

AspectRemote Asic Design EngineerRemote FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experienceBachelor's/Master's in Electrical Engineering or Computer Engineering, FPGA/ASIC design experience
Work EnvironmentDesigning integrated circuits for manufacturing, often in semiconductor companiesDeveloping programmable logic designs, often in research or product development teams
Industry UsageSemiconductor, consumer electronics, automotiveTelecommunications, aerospace, embedded systems

Both roles require similar educational backgrounds and design experience, but the Remote Asic Design Engineer focuses on creating chips for mass production, while the Remote FPGA Design Engineer works on programmable logic devices. Their work environments and industry applications differ, aligning with their specific design goals.

More about Remote Asic Design Engineer jobs

What cities are hiring for Remote Asic Design Engineer jobs?

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What are the most commonly searched types of Asic Design Engineer jobs?

The most popular types of Asic Design Engineer jobs are:

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Remote Asic Design Engineer jobs near you
Infographic showing various Remote Asic Design Engineer job openings in the United States as of August 2026, with employment types broken down into 80% Full Time, and 20% Contract. Highlights an 100% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

Senior FPGA Design Engineer

Hirekeyz Inc

Yorktown Heights, NY • Remote

$125K - $173K/yr

Contractor

Re-posted 17 hours ago

Job description

Role: Senior FPGA Design Engineer

Location: Remote

Duration: 12+ Months Contract

Job Summary:

Research team has a need for an Electrical Engineer highly experienced in the design and implementation of complex functions and solutions in FPGAs. Candidates must have an extensive knowledge of Verilog or VHDL;  they must possess the skills and experience customizing and integrating third-party IP, executing timing driven synthesis, running simulations, and performing design validation. Strong candidates will have design experience or a proficient understanding of the PCIe or Interlaken interface standards. Knowledge and fluency designing Xilinx FPGAs using the Vivado Design Suite is highly desirable.

  

Job Duties:

  • Job Duty 1 – Design (and implement) PCIe-to-Interlaken section of the Host FPGA Data Path. Interlaken is IP licensed from third-party.
  • Job Duty 2 -  Work with ASIC team to implement Host FPGA Interlaken interface to the ASIC’s Interlaken interface.
  • Job Duty 3 -  Work with Software team and Electronics Design team to test and verify functionality of entire data path from the Front-end Host to the Interlaken interface on the Host FPGA.
  • Job Duty 4 – Validate full data path between the Front-end Host and the ASIC S-Tree is functioning as designed.
  • Job Duty 5 – Optimize design for performance improvements.
  • Job Duty 6 – Write technical documentation describing FPGA architecture, its functional blocks and the data flow to and from the Host and ASIC.

Basic Skills, clearances and other elements required, in order of importance, and number of years’ experience, where applicable,  in each skill:

  • Bachelor’s or Master’s degree in Electrical Engineering.
  • Minimum of 10 years’ experience.
  • Design an FPGA based on functionality requirements and third-party IP for standardized interfaces; Implement design in Verilog or VHDL, synthesize FPGA, achieve timing closure, debug FPGA’s functionality in the system. (10 years).
  • Understanding of PCIe and how the interface works; Understanding of Interlaken and how the interface works.  (5 years).
  • Experience working with high-speed serial communication protocols.  Working with interfaces and logic blocks in different clock domains.  Design of clock trees for high-speed serial protocols. (10 years).
  • Design data structures and control mechanisms for transferring high-speed serial data between two protocols in different clock domains, i.e., queueing and/or buffer management.  (10 years).
  • Ability to work other design team which will interface with the FPGA or run Software using the FPGA logic.  Build a collaborative relationship with other team members..
  • Good communication skills, both written and verbal.
  • Demonstrated success working on a complex, tightly scheduled next-generation design where others depend on your work to progress.
  • Familiarity with Linux. 
  • Experience writing Python scripts.
  • Other: Show initiative by reading data sheets, specifications and other technical documentation.

 

Other Skills Desired, Years in each skill, where applicable:

  • Experience working with remote team members.
  • Exhibit eagerness to shorten learning curve and engage team members early.