ZipRecruiter

Log In

1

Principal Ic Layout Engineer Jobs (NOW HIRING)

SRI International

IC Layout Engineer III

Princeton, NJ · On-site

$92K - $122K/yr

SRI International (formerly Sarnoff Corporation) is looking for a capable IC Layout Engineer in our Princeton, NJ office. The successful candidate will be presented with challenges in IC Layout and ...

SRI International

IC Layout Engineer III

Princeton, NJ · On-site

$92K - $122K/yr

Overview SRI International (formerly Sarnoff Corporation) is looking for a capable IC Layout Engineer in our Princeton, NJ office. The successful candidate will be presented with challenges in IC ...

SRI International

IC Layout Engineer III

Princeton, NJ · On-site

$92K - $122K/yr

Overview SRI International (formerly Sarnoff Corporation) is looking for a capable IC Layout Engineer in our Princeton, NJ office. The successful candidate will be presented with challenges in IC ...

MediaTek Research Lab Inc.

IC Layout engineer

Irvine, CA · On-site

$85K - $137K/yr

Position Analog Layout Engineer, Analog Design and Circuit Technology, Irvine, California. Responsibilities * Work closely with the design team to develop high‑quality layouts for product ...

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...

next page

Showing results 1-20

All JobsPrincipal Ic Layout Engineer Jobs

Principal Ic Layout Engineer information

See salary details

$74K

$147.2K

$212.5K

How much do principal ic layout engineer jobs pay per year?

As of Sep 11, 2026, the average yearly pay for principal ic layout engineer in the United States is $147,220.00, according to ZipRecruiter salary data. Most workers in this role earn between $118,500.00 and $173,000.00 per year, depending on experience, location, and employer.

What cities are hiring for Principal Ic Layout Engineer jobs?

Cities with the most Principal Ic Layout Engineer job openings:

What states have the most Principal Ic Layout Engineer jobs?

States with the most job openings for Principal Ic Layout Engineer jobs include:

What are popular job titles related to Principal Ic Layout Engineer jobs?

For Principal Ic Layout Engineer jobs, the most frequently searched job titles are:

Infographic showing various Principal Ic Layout Engineer job openings in the United States as of August 2026, with employment types broken down into 92% Full Time, 2% Part Time, and 6% Contract. Highlights an 86% Physical, 5% Hybrid, and 9% Remote job distribution, with an average salary of $147,220 per year, or $70.8 per hour.

Analog IC Layout Engineer

South San Francisco, CA • On-site

Neuralink
Biotechnology Research and Development • 201 - 500 employees
Learn more about Neuralinkexternal

Full-time

Re-posted 14 days ago

Job description

Team Description:

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Job Description and Responsibilities:

We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include:

  • Crafting state-of-the-art layouts for mixed-signal and analog circuits
    • Amplifiers
    • Filters
    • Switched capacitor circuits
    • Oscillators
    • Data converters
    • Power management circuits
  • Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers
  • Physical verification of custom IC mask layouts (LVS, DRC, ERC)

Required Qualifications:

  • Bachelor of Science in Computer Engineering or related field
  • 2+ years of experience in analog and mixed-signal IC layout design
  • 1+ year experience with FinFET technologies
  • Ability to identify the best approach to solving problems

Preferred Qualifications:

  • Programming/scripting knowledge in SKILL, TCL, Shell, C/C++, and/or Python
  • Proven expertise in implementing analog and mixed-signal layout designs, achieving tight matching, low noise, and low power consumption
  • Understanding on failure-prone circuit and layout structures
  • Experience with analog DFM standards
  • Experience with layout P-cell design and implementation
  • Experience with layout automation 

Apply