ZipRecruiter

Log In

1

Post Silicon Validation Engineer Jobs in Arizona

Cirrus Logic

Senior Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

Contribute to both pre-silicon verification and post-silicon validation efforts. * Proactively ... Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.

Cirrus Logic

Staff Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

Contribute to both pre-silicon verification and post-silicon validation efforts. * Proactively ... Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a related field.

PowerLattice

Senior Digital Design Engineer

Chandler, AZ · On-site

$150K - $200K/yr

Head of Engineering About Us Powerlattice is a well-funded semiconductor start-up company backed by ... Support silicon bring-up, validation, and post-silicon debug activities * Analyze and resolve ...

Intel

Analog Engineer

Phoenix, AZ · On-site

$141K - $269K/yr

... post-silicon validation phases. - Serve as a technical interface to process technology, IP engineers, and product teams, leveraging design insights to influence future process node development.

Intel

IP Enablement Application Engineer

Phoenix, AZ · On-site

... post-silicon validation and debug. The position embodies customer obsession by quickly resolving ... Bachelor's degree in Electrical Engineering, Computer Science, or in a STEM related field of study ...

TechStaff, Inc

Product Engineer

Chandler, AZ · On-site

$140K - $150K/yr

... the SMTS Product engineer is responsible for bringing all new MRAM products(NPI) to market ... First silicon validation, debug, and qualification. * Responsible for developing and implementing ...

Techstaff

Product Engineer

Chandler, AZ

... the SMTS Product engineer is responsible for bringing all new MRAM products(NPI) to market ... First silicon validation, debug, and qualification. * Responsible for developing and implementing ...

previous pagenext page

Showing results 21-40

All JobsPost Silicon Validation Engineer JobsPost Silicon Validation Engineer Jobs in Arizona

Post Silicon Validation Engineer information

See Arizona salary details

$21

$48

$72

How much do post silicon validation engineer jobs pay per hour?

As of Sep 3, 2026, the average hourly pay for post silicon validation engineer in Arizona is $48.45, according to ZipRecruiter salary data. Most workers in this role earn between $36.73 and $58.89 per hour, depending on experience, location, and employer.

What is a post silicon validation engineer?

A Post Silicon Validation Engineer is a professional who tests and validates integrated circuits (ICs) or chips after they have been fabricated ('post-silicon'). Their main role is to ensure that the hardware functions correctly according to design specifications and to identify any issues that might have been missed during pre-silicon simulation and verification. This involves running a variety of tests using specialized equipment, debugging hardware and firmware, and collaborating with design and verification teams to resolve issues. Post Silicon Validation Engineers play a critical role in the product development cycle by ensuring chip reliability and performance before mass production.

What are the key skills and qualifications needed to thrive as a post silicon validation engineer?

To thrive as a Post Silicon Validation Engineer, you need a solid background in electrical or computer engineering, experience with hardware debugging, and proficiency in programming languages like C/C++ or Python. Familiarity with lab equipment (oscilloscopes, logic analyzers), validation frameworks, and knowledge of industry standards is essential, with some roles requiring relevant certifications. Strong analytical skills, problem-solving abilities, and effective communication set top performers apart in this field. These skills are crucial for identifying, diagnosing, and resolving silicon issues quickly to ensure product reliability and meet tight development schedules.

What are some common challenges faced by post silicon validation engineers during the product development cycle?

Post Silicon Validation Engineers often encounter challenges such as debugging complex hardware-software interactions, identifying root causes of functional failures, and working under tight deadlines to ensure product readiness. The role requires effective collaboration with design, firmware, and test engineering teams to rapidly resolve issues discovered on silicon. Additionally, engineers must adapt quickly to evolving specifications and toolsets as new silicon revisions are introduced, making adaptability and problem-solving critical to success.

What is the difference between Post Silicon Validation Engineer vs ASIC Validation Engineer?

AspectPost Silicon Validation EngineerASIC Validation Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentPost-production testing, debugging hardware, and firmware validationPre-silicon design verification, simulation, and functional testing
Industry UsageUsed after chip fabrication to ensure hardware functions correctlyUsed during chip design phase to verify functionality before fabrication

Post Silicon Validation Engineers focus on testing and debugging chips after manufacturing, ensuring hardware functions as intended. In contrast, ASIC Validation Engineers work during the design phase to verify chip functionality through simulation and pre-silicon testing. Both roles require similar educational backgrounds but differ in work environment and project timing.

What are popular job titles related to Post Silicon Validation Engineer jobs in Arizona?

For Post Silicon Validation Engineer jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Post Silicon Validation Engineer jobs in Arizona look for?

The top searched job categories for Post Silicon Validation Engineer jobs in Arizona are:

What cities in Arizona are hiring for Post Silicon Validation Engineer jobs?

Cities in Arizona with the most Post Silicon Validation Engineer job openings:

Post Silicon Validation Engineer jobs near you
Infographic showing various Post Silicon Validation Engineer job openings in Arizona as of August 2026, with employment types broken down into 63% Full Time, 31% Part Time, and 6% Contract. Highlights an 87% In-person, and 13% Remote job distribution, with an average salary of $100,786 per year, or $48.5 per hour.

Senior/Staff Analog IC Design Engineer

PowerLattice

Chandler, AZ • On-site

$150 - $200/hr

Other

Medical, Dental, Vision, Retirement

Posted 17 days ago

Job description

About Us

PowerLattice is a well-funded semiconductor startup backed by leading Silicon Valley venture capital firms. We are developing a groundbreaking chiplet solution for a fundamental shift in how high-performance chips are powered, paving the way for the next generation of AI and advanced computing.

About the Role

We are seeking a motivated and detail-oriented Senior or Staff level Analog IC Designer to join our engineering team. In this role, you will design and develop high-quality analog and mixed-signal integrated circuits, contributing to fundamental analog building blocks from initial specification through post-layout verification and silicon validation.

You will work closely with cross-functional teams, including layout, verification, and silicon validation, and play a key role in delivering robust, production-ready designs.

Key Responsibilities
  • Design and develop core analog and mixed-signal circuit blocks, including bandgap references, oscillators, LDOs, op-amps, ADCs, and DACs
  • Translate system and block-level specifications into robust circuit architectures and implementations
  • Perform schematic capture, simulation, and optimization to meet performance, power, area, and reliability targets
  • Provide layout guidance and collaborate closely with layout engineers to ensure design intent is met
  • Perform post-layout (PEX) simulations and correlations with pre-layout analysis
  • Participate in design reviews and contribute to clear, thorough design documentation
  • Support silicon bring-up, block-level evaluation, characterization, and debugging
  • Apply best practices for analog design, verification, and sign-off
Minimum Qualifications

This role is Hybrid requiring 3 days a week onsite in the office

  • Bachelor’s degree in Electrical Engineering, Computer Science or a related field
  • 5+ years of hands-on analog design experience
  • Strong foundation in analog circuit theory, device physics, and CMOS technologies
  • Experience designing common analog blocks such as bandgaps, LDOs, oscillators, op-amps, ADCs, and DACs
  • Proven ability to carry designs from specification through schematic, simulation, layout guidance, and post-layout verification
  • Proficiency with industry-standard EDA tools (e.g., Cadence)
  • Solid experience with DC, AC, transient, noise, and corner simulations
  • Working knowledge of reliability, mismatch, and layout-dependent effects
  • Hands-on laboratory experience, including silicon bring-up, bench characterization, and debugging of analog/mixed-signal ICs

Preferred Qualifications

  • Experience with deep submicron CMOS process technologies
  • Familiarity with high-power or high-accuracy analog design techniques
  • Strong communication skills and the ability to work effectively in a collaborative team environment

Compensation & Benefits

Anticipated annual base salary for Member of Technical Staff: $150,000 - $200,000

  • Stock option grant
  • Comprehensive benefits package including health, dental, vision, and 401(k)
#J-18808-Ljbffr

Apply