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Post Silicon Validation Engineer Jobs (NOW HIRING)

Etched

Post-Silicon Validation Engineer

San Jose, CA · On-site

$160K - $260K/yr

Job Summary We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and ...

Etched

Post-Silicon Validation Engineer

San Jose, CA · On-site

$160K - $260K/yr

Job Summary We are seeking a highly skilled and motivated Post Silicon Validation Engineer to join our dynamic team. The ideal candidate will be responsible for bringing up, validating, and ...

Semtech

Silicon Validation Engineer

San Diego, CA · On-site

The Validation Engineer is responsible for pre- and post-silicon validation of mixed-signal ... Post-silicon responsibilities encompass IC bring-up, hardware-firmware debug, bench ...

Semtech

Silicon Validation Engineer

San Diego, CA · On-site

Post-silicon responsibilities encompassICbring-up, hardware-firmware debug, bench characterization ofanalogand mixed-signalperformance, and systematic root-cause analysis of silicon and system-level ...

TEKsystems

Post Silicon Validation Engineer

Rocklin, CA

$65 - $100/hr

Using validation infrastructure and the test plan, a validation engineer develops and executes pre- and post-silicon tests that fully exercise the prototype SoC and embedded FW. The primary skill of ...

TEKsystems

Post Silicon Validation Engineer

Rocklin, CA · On-site

Using validation infrastructure and the test plan, a validation engineer develops and executes pre- and post-silicon tests that fully exercise the prototype SoC and embedded FW. The primary skill of ...

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How much do post silicon validation engineer jobs pay per hour?

As of Sep 12, 2026, the average hourly pay for post silicon validation engineer in the United States is $52.00, according to ZipRecruiter salary data. Most workers in this role earn between $39.42 and $63.22 per hour, depending on experience, location, and employer.

What is a post silicon validation engineer?

A Post Silicon Validation Engineer is a professional who tests and validates integrated circuits (ICs) or chips after they have been fabricated ('post-silicon'). Their main role is to ensure that the hardware functions correctly according to design specifications and to identify any issues that might have been missed during pre-silicon simulation and verification. This involves running a variety of tests using specialized equipment, debugging hardware and firmware, and collaborating with design and verification teams to resolve issues. Post Silicon Validation Engineers play a critical role in the product development cycle by ensuring chip reliability and performance before mass production.

What are the key skills and qualifications needed to thrive as a post silicon validation engineer?

To thrive as a Post Silicon Validation Engineer, you need a solid background in electrical or computer engineering, experience with hardware debugging, and proficiency in programming languages like C/C++ or Python. Familiarity with lab equipment (oscilloscopes, logic analyzers), validation frameworks, and knowledge of industry standards is essential, with some roles requiring relevant certifications. Strong analytical skills, problem-solving abilities, and effective communication set top performers apart in this field. These skills are crucial for identifying, diagnosing, and resolving silicon issues quickly to ensure product reliability and meet tight development schedules.

What are some common challenges faced by post silicon validation engineers during the product development cycle?

Post Silicon Validation Engineers often encounter challenges such as debugging complex hardware-software interactions, identifying root causes of functional failures, and working under tight deadlines to ensure product readiness. The role requires effective collaboration with design, firmware, and test engineering teams to rapidly resolve issues discovered on silicon. Additionally, engineers must adapt quickly to evolving specifications and toolsets as new silicon revisions are introduced, making adaptability and problem-solving critical to success.

What is the difference between Post Silicon Validation Engineer vs ASIC Validation Engineer?

AspectPost Silicon Validation EngineerASIC Validation Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentPost-production testing, debugging hardware, and firmware validationPre-silicon design verification, simulation, and functional testing
Industry UsageUsed after chip fabrication to ensure hardware functions correctlyUsed during chip design phase to verify functionality before fabrication

Post Silicon Validation Engineers focus on testing and debugging chips after manufacturing, ensuring hardware functions as intended. In contrast, ASIC Validation Engineers work during the design phase to verify chip functionality through simulation and pre-silicon testing. Both roles require similar educational backgrounds but differ in work environment and project timing.

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Post Silicon Validation Engineer jobs near you
Infographic showing various Post Silicon Validation Engineer job openings in the United States as of September 2026, with employment types broken down into 1% As Needed, 83% Full Time, 13% Part Time, and 3% Contract. Highlights an 93% Physical, 2% Hybrid, and 5% Remote job distribution, with an average salary of $108,152 per year, or $52 per hour.

Post Silicon Validation Engineer Ethernet

Santa Clara, CA • On-site

Rootshell Enterprise Technologies, Inc.
11 - 50 employees
Learn more about Rootshell Enterprise Technologies, Inc.external

Full-time

Re-posted 12 days ago

Job description

Hello All,
Greetings from Rootshell Inc.
Rootshell Enterprise Technologies Inc. is a recognized provider of professional IT Consulting services in the US. We are actively seeking Post Silicon Validation Engineer Ethernet for one of our client, Please share your resume with current location & full contact info
Job Title: Post Silicon Validation Engineer Ethernet
Location: Santa Clara, CA - Onsite
Job Description:
Duties:
Develop and run post-silicon validation tests and associated scripts for successfully validating Ethernet network interfaces (PHY / PCS / MAC).
Analyze and debug test failures independently to identify root cause.
Debug complex cross-functional issues with ASIC, system hardware, and software engineers.
Build powerful programs in Python and C to automate testing, regression, and debugging.
Skills:
5+ years of relevant post-silicon validation experience.
Proficiency with lab equipment, logic analyzers, and oscilloscopes.
Expertise in Python and C.
Thorough understanding of Ethernet PHY / PCS / MAC standards (e.g. IEEE 802.3) and technologies.
Proven success in functional and electrical bringup and validation of PAM4 and NRZ Ethernet interfaces on multiple ASICs.
Hands-on experience with traffic generators such as Spirent and Ixia
Demonstrated ownership and independence in planning, analyzing, debugging, driving vendors, and reporting status.
  • Strong collaboration and communication skills.

Regards,
Naveen
Naveen@rootshellinc.com

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