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Post Silicon Validation Engineer Jobs (NOW HIRING)

We are seeking a Post-Silicon Validation Engineer to drive the bring-up, characterization, and debugging of our next-generation Ethernet and PCIe Retimer chips . This role heavily focuses on advanced ...

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How much do post silicon validation engineer jobs pay per hour?

As of Aug 22, 2026, the average hourly pay for post silicon validation engineer in the United States is $52.00, according to ZipRecruiter salary data. Most workers in this role earn between $39.42 and $63.22 per hour, depending on experience, location, and employer.

What is a post silicon validation engineer?

A Post Silicon Validation Engineer is a professional who tests and validates integrated circuits (ICs) or chips after they have been fabricated ('post-silicon'). Their main role is to ensure that the hardware functions correctly according to design specifications and to identify any issues that might have been missed during pre-silicon simulation and verification. This involves running a variety of tests using specialized equipment, debugging hardware and firmware, and collaborating with design and verification teams to resolve issues. Post Silicon Validation Engineers play a critical role in the product development cycle by ensuring chip reliability and performance before mass production.

What are the key skills and qualifications needed to thrive as a post silicon validation engineer?

To thrive as a Post Silicon Validation Engineer, you need a solid background in electrical or computer engineering, experience with hardware debugging, and proficiency in programming languages like C/C++ or Python. Familiarity with lab equipment (oscilloscopes, logic analyzers), validation frameworks, and knowledge of industry standards is essential, with some roles requiring relevant certifications. Strong analytical skills, problem-solving abilities, and effective communication set top performers apart in this field. These skills are crucial for identifying, diagnosing, and resolving silicon issues quickly to ensure product reliability and meet tight development schedules.

What are some common challenges faced by post silicon validation engineers during the product development cycle?

Post Silicon Validation Engineers often encounter challenges such as debugging complex hardware-software interactions, identifying root causes of functional failures, and working under tight deadlines to ensure product readiness. The role requires effective collaboration with design, firmware, and test engineering teams to rapidly resolve issues discovered on silicon. Additionally, engineers must adapt quickly to evolving specifications and toolsets as new silicon revisions are introduced, making adaptability and problem-solving critical to success.

What is the difference between Post Silicon Validation Engineer vs ASIC Validation Engineer?

AspectPost Silicon Validation EngineerASIC Validation Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentPost-production testing, debugging hardware, and firmware validationPre-silicon design verification, simulation, and functional testing
Industry UsageUsed after chip fabrication to ensure hardware functions correctlyUsed during chip design phase to verify functionality before fabrication

Post Silicon Validation Engineers focus on testing and debugging chips after manufacturing, ensuring hardware functions as intended. In contrast, ASIC Validation Engineers work during the design phase to verify chip functionality through simulation and pre-silicon testing. Both roles require similar educational backgrounds but differ in work environment and project timing.

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What cities are hiring for Post Silicon Validation Engineer jobs?

Cities with the most Post Silicon Validation Engineer job openings:

What states have the most Post Silicon Validation Engineer jobs?

States with the most job openings for Post Silicon Validation Engineer jobs include:

Infographic showing various Post Silicon Validation Engineer job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 81% Full Time, 14% Part Time, and 4% Contract. Highlights an 95% Physical, 2% Hybrid, and 3% Remote job distribution, with an average salary of $108,152 per year, or $52 per hour.

Pre and Post Silicon Validation Engineer

Insilico

San Diego, CA

Contractor

Re-posted 4 days ago


Job description

Company Description

Insilico is an End-to-End specialized VLSI, Embedded Design & Software services and solutions company. It operates in the "Compute" & "Connectivity" space.
Insilico is founded by industry veterans, who are strong leaders and practitioners with diverse experience in all the relevant aspects of technology and execution. The management and its entire team, handpicked from among the best talents in the industry, can adapt to the evolving technologies and growing market challenges internationally. Insilico has very flexible business models to suit a plethora of client needs.
With a current clientele of top semiconductor companies, Insilico has a wide and diversified spectrum of service offerings in expansive domains within the ambit of Embedded Design & Software, and in almost all areas of VLSI design, from Spec-to-Silicon, on a wide range of ASICs & CPUs/GPUs in all the latest technologies, including 7nm.
Being an integral part of a larger business eco-system, Insilico has the foundation of strong financials, validated processes, robust infrastructure and a global network of reputable clientele.
Insilico's service portfolio caters to products that empower the world of Communication, Networking, CPU/Servers, Automobile, Bio-Medicals, Consumer Electronics and a wide range of IOTs.
Headquartered in the US, it has operations in India & APAC.
 

Job Description

Job Role: Pre and Post Silicon Validation Engineer

Location: San Diego, CA

Duration: 24 Months

Pre and Post Silicon Validation Team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon. The Validation team works closely with architects, designers, verification engineers, software engineers, and customers. The team is currently seeking candidates who are familiar with pre-silicon test development and post-silicon bring-up and validation. 

Qualifications

Candidate will have a minimum of 3 years of SW/FW experience working in emulation and silicon environments.

Candidates are expected to have experience in:

- Low Level software development in C and Assembly.

- Debugging low level software and hardware issues.

- Implementing drivers and test content.

- Debug tools including JTAG, Logic Analyzer, Oscilloscope, etc., and kernel debuggers.

- Emulation environments for development and debug.

- Basic understanding of power and performance.

- Knowledge of SOC architecture and in-depth knowledge of at least one sub system (CPU, Power Management, Security IPs, System Performance, Clocks, DDR, etc.)

- Good communication skills and ability & desire to work in a cross-functional team environment.

Additional Information

Experience with post-silicon enabling and bring-up. Understanding of coherency and concurrency in modern SoC architectures.

Experience with at least one of: Perl, Python, TCL, C++, or Java. Industry experience preferred but not required. All your information will be kept confidential according to EEO guidelines.