Physical Design Engineer
$141K - $145K/yr
We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...
Physical Design Engineer
$141K - $145K/yr
We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...
Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...
Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...
Physical Design Engineer
Hillsboro, OR · On-site
$148K - $152K/yr
Physical Design Engineer Job Location: Hillsboro, OR Job Type: Fulltime In this position, you will be developing and supporting mixed signal and custom digital hard IPs. The job will entail: files ...
Physical Design Engineer
Hillsboro, OR · On-site
$148K - $152K/yr
Physical Design Engineer Job Location: Hillsboro, OR Job Type: Fulltime In this position, you will be developing and supporting mixed signal and custom digital hard IPs. The job will entail: files ...
Physical Design Engineer
Hillsboro, OR · On-site
$148K - $152K/yr
Physical Design Engineer Job Location: Hillsboro, OR Job Type: Fulltime In this position, you will be developing and supporting mixed signal and custom digital hard IPs. The job will entail: files ...
Physical Design Engineer
Hillsboro, OR · On-site
$148K - $152K/yr
Physical Design Engineer Job Location: Hillsboro, OR Job Type: Fulltime In this position, you will be developing and supporting mixed signal and custom digital hard IPs. The job will entail: files ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA ...
CPU Physical Design Engineer
Beaverton, OR · On-site
$141K - $145K/yr
As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
CPU Physical Design Engineer
$181K - $318K/yr
Description As a CPU Physical Design Engineer, you will drive or participate in the following: • Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ...
OR · On-site
$190K - $280K/yr
The Role We are looking for a Principal ASIC Physical Design Engineer to lead the implementation of complex SoCs for next-generation satellite and space systems. You will own the full physical design ...
OR · On-site
$170K - $250K/yr
The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that power next-generation satellite and space systems. In this role, you will contribute to the full ...
Physical Design Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$148K - $152K/yr
We are growing our silicon team, seeking physical design engineers passionate about innovation at the intersection between emerging semiconductor technology and novel computing paradigms. As a member ...
Physical Design Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$148K - $152K/yr
We are growing our silicon team, seeking physical design engineers passionate about innovation at the intersection between emerging semiconductor technology and novel computing paradigms. As a member ...
Circuits Physical Design Engineer - Library/Process Monitor
Beaverton, OR · On-site
$141K - $145K/yr
We have an extraordinary opportunity for Physical Design Engineers. In this highly visible role, you will be at the heart of a processor design effort, working with foundation IP developers on ...
Circuits Physical Design Engineer - Library/Process Monitor
Beaverton, OR · On-site
$141K - $145K/yr
We have an extraordinary opportunity for Physical Design Engineers. In this highly visible role, you will be at the heart of a processor design effort, working with foundation IP developers on ...
Physical Design Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$148K - $152K/yr
We are growing our silicon team, seeking physical design engineers passionate about innovation at the intersection between emerging semiconductor technology and novel computing paradigms. As a member ...
Physical Design Engineer - Neuromorphic Computing
Hillsboro, OR · On-site
$148K - $152K/yr
We are growing our silicon team, seeking physical design engineers passionate about innovation at the intersection between emerging semiconductor technology and novel computing paradigms. As a member ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... MS in Electrical/Electronics/Computer Engineering or related field.Experience with partition level ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... MS in Electrical/Electronics/Computer Engineering or related field.Experience with partition level ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum BS and 0+ years of industry experience MS in Electrical/Electronics/Computer Engineering or ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum BS and 0+ years of industry experience MS in Electrical/Electronics/Computer Engineering or ...
SoC Physical Design Engineer, PnR
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Preferred Qualifications MS in Electrical/Electronics/Computer Engineering or related field.
SoC Physical Design Engineer, PnR
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Preferred Qualifications MS in Electrical/Electronics/Computer Engineering or related field.
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum BS and 0+ years of industry experience MS in Electrical/Electronics/Computer Engineering or ...
SoC Physical Design Engineer, PnR
Beaverton, OR · On-site
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Minimum BS and 0+ years of industry experience MS in Electrical/Electronics/Computer Engineering or ...
SoC Physical Design Engineer, PnR
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Preferred Qualifications MS in Electrical/Electronics/Computer Engineering or related field.
SoC Physical Design Engineer, PnR
$141K - $145K/yr
In this visible role, you will be directly responsible for the physical implementation of design ... Preferred Qualifications MS in Electrical/Electronics/Computer Engineering or related field.
Physical Design Engineer Intern information
What are the key skills and qualifications needed to thrive as a Physical Design Engineer Intern, and why are they important?
To thrive as a Physical Design Engineer Intern, you generally need a solid background in electrical engineering, digital circuit design, and semiconductor fundamentals, often supported by ongoing university studies in a related field. Familiarity with industry-standard EDA tools such as Cadence, Synopsys, or Mentor Graphics, as well as scripting languages like TCL or Python, is highly valuable. Attention to detail, problem-solving abilities, and effective teamwork are crucial soft skills for excelling in this role. These skills and qualifications are important because they ensure accurate chip layouts, efficient workflows, and successful collaboration within complex engineering teams.
What types of projects and tasks can a Physical Design Engineer Intern expect to work on during their internship?
As a Physical Design Engineer Intern, you will typically be involved in supporting the design and verification of integrated circuits at the physical level. Common tasks include assisting with floorplanning, placement and routing, timing analysis, and running design rule checks using industry-standard EDA tools. You may also participate in team meetings, collaborate with senior engineers, and help resolve issues related to power, performance, and area optimization. These hands-on experiences are designed to help you build practical skills and gain a deeper understanding of the physical design flow in VLSI chip development.
What does a Physical Design Engineer Intern do?
A Physical Design Engineer Intern assists in the process of transforming a circuit design (RTL) into a real, manufacturable layout for semiconductor chips. They work on tasks such as floorplanning, placement, routing, timing analysis, and verifying that the chip design meets all physical and electrical requirements. Interns typically use electronic design automation (EDA) tools to perform these tasks and collaborate with experienced engineers. Their work is crucial in ensuring that chips are both functional and manufacturable at scale.
What is the difference between Physical Design Engineer Intern vs Digital Design Engineer Intern?
| Aspect | Physical Design Engineer Intern | Digital Design Engineer Intern |
|---|---|---|
| Required Credentials | Typically pursuing or holding a degree in Electrical Engineering or Computer Engineering | Typically pursuing or holding a degree in Electrical Engineering or Computer Engineering |
| Work Environment | Designing and implementing physical chip layouts, working with EDA tools | Designing digital logic circuits, working on HDL coding and simulation |
| Industry Usage | Foundries, semiconductor companies, integrated circuit design firms | Semiconductor companies, integrated circuit design firms, tech companies |
Physical Design Engineer Interns focus on translating digital logic designs into physical layouts for chips, working closely with EDA tools. Digital Design Engineer Interns concentrate on creating and simulating digital logic circuits using hardware description languages. Both roles are essential in chip development but differ in their specific tasks and focus areas.
What are the most commonly searched types of Physical Design Engineer jobs in Oregon? The most popular types of Physical Design Engineer jobs in Oregon are:
What are popular job titles related to Physical Design Engineer Intern jobs in Oregon? For Physical Design Engineer Intern jobs in Oregon, the most frequently searched job titles are:
- Senior Remote Electrical Engineering
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What job categories do people searching Physical Design Engineer Intern jobs in Oregon look for? The top searched job categories for Physical Design Engineer Intern jobs in Oregon are:
- Vlsi Design Engineer Intern
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What cities in Oregon are hiring for Physical Design Engineer Intern jobs? Cities in Oregon with the most Physical Design Engineer Intern job openings:
Apple rating
8.1
Based on 661 frontline employees who took The Breakroom Quiz
6th of 30 rated technology retailers
Job description
At Apple we work every single day to craft products that enrich people’s lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming products that will delight and encourage millions of Apple’s customers every single day. In this role, we will be at the center of a PHY design effort working with architecture, CAD, timing, and logic design teams, with a critical impact on delivering outstanding PHY designs. You will be required to do physical designs of outstanding PHY design.
Description
As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include but are not limited to: Generate block/chip level static timing constraints. Build full chip floor-plan including pin placement, partitions and power grid. Develop and validate high performance low power clock network guidelines. Perform block level place and route and close the design to meet timing, area and power constraints. Generate and Implement ECOs to fix timing, noise and EM IR violations. Run Physical Design verification flow at chip/block level and provide guidelines to fix LVS/DRC violations to other designers. Participate in establishing CAD and physical design methodologies for correct by construction designs. Assist in flow development for chip integration.
Preferred Qualifications
The ideal candidate will have deep design experience in high PHY and/or SOC designs.
Deep Knowledge about industry standards and practices in Physical Design, including Physically aware synthesis, Floor-planning, and Place & Route.
Experience in developing and implementing Power-grid and Clock specifications.
Strong understanding of all aspects of Physical construction, Integration and Physical Verification.
Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools.
Deep Understanding of scripting languages such as Perl/Tcl, solid understanding of Extraction and STA methodology and tools.
Deep Understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level.
Minimum Qualifications
Bachelors of Science in Electrical Engineering and 10 years experience preferred.
Description
As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include but are not limited to: Generate block/chip level static timing constraints. Build full chip floor-plan including pin placement, partitions and power grid. Develop and validate high performance low power clock network guidelines. Perform block level place and route and close the design to meet timing, area and power constraints. Generate and Implement ECOs to fix timing, noise and EM IR violations. Run Physical Design verification flow at chip/block level and provide guidelines to fix LVS/DRC violations to other designers. Participate in establishing CAD and physical design methodologies for correct by construction designs. Assist in flow development for chip integration.
Preferred Qualifications
The ideal candidate will have deep design experience in high PHY and/or SOC designs.
Deep Knowledge about industry standards and practices in Physical Design, including Physically aware synthesis, Floor-planning, and Place & Route.
Experience in developing and implementing Power-grid and Clock specifications.
Strong understanding of all aspects of Physical construction, Integration and Physical Verification.
Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools.
Deep Understanding of scripting languages such as Perl/Tcl, solid understanding of Extraction and STA methodology and tools.
Deep Understanding of Physical Design Verification methodology to debug LVS/DRC issues at chip/block level.
Minimum Qualifications
Bachelors of Science in Electrical Engineering and 10 years experience preferred.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976