The Advanced Design (AD) team is part of Intel's larger Design Technology Platform (DTP ... Position of TrustN/A Benefits We offer a total compensation package that ranks among the best in ...
The Advanced Design (AD) team is part of Intel's larger Design Technology Platform (DTP ... Position of TrustN/A Benefits We offer a total compensation package that ranks among the best in ...
The Advanced Design (AD) team is part of Intel's larger Design Technology Platform (DTP ... Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in ...
The Advanced Design (AD) team is part of Intel's larger Design Technology Platform (DTP ... Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in ...
$190K - $280K/yr
You will own the full physical design flow-from RTL handoff to GDSII-and collaborate closely with architecture, RTL design, DFT, and packaging teams. This role also involves managing external ...
Director-Analog Design & Infrastructure Design Automation
Hillsboro, OR · On-site
$180K/yr
Enable reproducible simulations and environment packaging. * Create dashboards and reporting metrics for design data health and DA service KPIs. 4. Leadership & Cross-Functional Collaboration * Lead ...
Director-Analog Design & Infrastructure Design Automation
Hillsboro, OR · On-site
$180K/yr
Enable reproducible simulations and environment packaging. * Create dashboards and reporting metrics for design data health and DA service KPIs. 4. Leadership & Cross-Functional Collaboration * Lead ...
EDA Design Flow Development Engineer
Hillsboro, OR · On-site
$141K - $269K/yr
The engineer will work closely with circuit design, physical design, package, reliability, and signoff teams to enable scalable and accurate EM/IR analysis methodologies for advanced-node designs.
EDA Design Flow Development Engineer
Hillsboro, OR · On-site
$141K - $269K/yr
The engineer will work closely with circuit design, physical design, package, reliability, and signoff teams to enable scalable and accurate EM/IR analysis methodologies for advanced-node designs.
In addition to independent execution, you may lead defined scope or small packages, coordinating ... Advance design automation skills and embrace emerging technologies * Contribute to a collaborative ...
Quick apply
In addition to independent execution, you may lead defined scope or small packages, coordinating ... Advance design automation skills and embrace emerging technologies * Contribute to a collaborative ...
Providing comprehensive 2D/REVIT drawing packages that are clear, accurate, and follow the site design standards. Verifying, updating, and drafting comprehensive chemical/mechanical plans including ...
New
Quick apply
Providing comprehensive 2D/REVIT drawing packages that are clear, accurate, and follow the site design standards. Verifying, updating, and drafting comprehensive chemical/mechanical plans including ...
New
$170K - $250K/yr
In this role, you will contribute to the full physical design flow-from synthesis to GDSII-working closely with architecture, RTL, verification, and packaging teams. You'll be a key contributor in ...
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Project Design Manager
Portland, OR · On-site
$87K/yr
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Project Design Manager
Portland, OR · On-site
$87K/yr
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Analog Circuit Design Engineer
$164K - $232K/yr
Design and develop analog and mixed-signal ICs for power delivery IPs, including IVRs, LDOs, DC-DC ... Perform power integrity analysis including IR drop, decoupling strategies, and package interaction ...
Analog Circuit Design Engineer
$164K - $232K/yr
Design and develop analog and mixed-signal ICs for power delivery IPs, including IVRs, LDOs, DC-DC ... Perform power integrity analysis including IR drop, decoupling strategies, and package interaction ...
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Job Title Project Design Manager Summary The Project Design Manager's role is to be the main point ... In addition to a comprehensive benefits package, Cushman and Wakefield provide eligible employees ...
Engineering Design Manager
OR · Remote
Oversee end-to-end delivery of 2D drawing packages, including system layouts, subassembly drawings ... Ensure adherence to design review processes and stage-gate milestones,maintaininghigh standardsfor ...
Engineering Design Manager
OR · Remote
Oversee end-to-end delivery of 2D drawing packages, including system layouts, subassembly drawings ... Ensure adherence to design review processes and stage-gate milestones,maintaininghigh standardsfor ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation ... Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation ... Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation ... Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined ...
SoC Physical Design Verification Engineer
$129K - $194K/yr
As part of our Silicon Technologies group, you'll help design and manufacture our next-generation ... Pay & Benefits At Apple, base pay is one part of our total compensation package and is determined ...
Tooling Design Engineer
Portland, OR · On-site
$90K - $104K/yr
Prepare BOMs and print packages. * Submit ECRs. * Provide project status reports and management ... Design, Industrial, or Mechanical Engineering preferred * 3-5 years' experience in Mechanical ...
Tooling Design Engineer
Portland, OR · On-site
$90K - $104K/yr
Prepare BOMs and print packages. * Submit ECRs. * Provide project status reports and management ... Design, Industrial, or Mechanical Engineering preferred * 3-5 years' experience in Mechanical ...
Tooling Design Engineer
$90K - $104K/yr
Prepare BOMs and print packages. * Submit ECRs. * Provide project status reports and management ... Design, Industrial, or Mechanical Engineering preferred * 3-5 years' experience in Mechanical ...
Tooling Design Engineer
$90K - $104K/yr
Prepare BOMs and print packages. * Submit ECRs. * Provide project status reports and management ... Design, Industrial, or Mechanical Engineering preferred * 3-5 years' experience in Mechanical ...
Tooling Design Engineer
$90K - $104K/yr
Prepare BOMs and print packages. * Submit ECRs. * Provide project status reports and management ... Design, Industrial, or Mechanical Engineering preferred * 3-5 years' experience in Mechanical ...
Tooling Design Engineer
$90K - $104K/yr
Prepare BOMs and print packages. * Submit ECRs. * Provide project status reports and management ... Design, Industrial, or Mechanical Engineering preferred * 3-5 years' experience in Mechanical ...
Senior Design Engineer
Portland, OR · On-site
$150K - $189K/yr
Developing plans, specifications, and cost estimate packages for civil engineering projects * Civil engineering design for site development and surface water management projects including grading ...
Senior Design Engineer
Portland, OR · On-site
$150K - $189K/yr
Developing plans, specifications, and cost estimate packages for civil engineering projects * Civil engineering design for site development and surface water management projects including grading ...
Packaging Design information
See Oregon salary details
$95.2K - $99.6K
0% of jobs
$99.6K - $104.1K
0% of jobs
$104.1K - $108.6K
0% of jobs
$108.6K - $113K
0% of jobs
$113K - $117.5K
0% of jobs
$117.5K - $122K
0% of jobs
$122K - $126.4K
0% of jobs
$126.4K - $130.9K
0% of jobs
$130.9K - $135.4K
0% of jobs
$135.4K - $139.8K
0% of jobs
$141K is the 25th percentile. Wages below this are outliers.
$139.8K - $144.3K
100% of jobs
$95.2K
$144.3K
How much do packaging design jobs pay per year?
What are the key skills and qualifications needed to thrive as a Packaging Designer, and why are they important?
How does a packaging designer typically collaborate with marketing and product development teams?
What is packaging design?
What is the difference between Packaging Design vs Graphic Designer?
| Aspect | Packaging Design | Graphic Designer |
|---|---|---|
| Credentials | Design degree, packaging certifications | Design degree, graphic design certifications |
| Work Environment | Packaging companies, branding agencies | Advertising agencies, media companies |
| Industry Usage | Product packaging, retail | |
| Search Intent | Packaging design jobs, packaging artist | Graphic design jobs, visual artist |
Packaging Design and Graphic Designer roles share similar design skills and educational backgrounds, but differ in focus. Packaging Design specializes in creating functional and attractive packaging for products, often requiring knowledge of materials and manufacturing. Graphic Designers work on visual communication across various media, emphasizing branding, advertising, and digital content. Both roles are vital in branding and marketing, but Packaging Design is more industry-specific to product presentation and retail packaging.
Is packaging design in demand?
What does a packaging designer do?
How to get a job designing packaging?
How much do packaging designers make in the US?

Full-time
Medical, Retirement, PTO
Re-posted 7 days ago
Intel rating
8.7
Based on 147 frontline employees who took The Breakroom Quiz
11th of 143 rated electronics manufacturers
Job description
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
The Advanced Design (AD) team is part of Intel's larger Design Technology Platform (DTP) Organization and is focused on pathfinding and development of advanced memory technology. These circuits enable best-in-class memory collateral, IP and innovative product design across all generations of Intel process technology. At Intel, DTP is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable Intel's internal and external customers to get to the market faster with products that include high-performance, high-density, low-power memory at the leading edge of the technology curve and implemented in Intel's advanced CMOS process technologies.
You will be partnering with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel advanced CMOS process technologies. In this position your responsibilities will include, but may not be limited to:
- Memory pathfinding activities and power, performance and area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement.
- Memory bit-cell and complex periphery IC layout and automation.
- Memory array/IP design, memory circuit innovation, test-chip design.
- Pre-Si verification, post-Si validation and debugging to enable yield and parametric tracking/ramp.
You must possess the minimum qualifications listed below to interview for this position. Preferred qualifications are not required but may work to your advantage during the interview process.
Minimum Qualifications:
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline, including 4+ years of professional experience gained through either internships or full-time employment Or a PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline.
Technical Experience:
- Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM.
- Design trade-offs between power, performance, and area (PPA).
- Custom digital circuit design, simulation, layout design, and verification.
- Knowledge of EDA tools used for custom digital and memory circuit design.
Preferred Qualifications:
- PhD with 1-2 years of professional experience gained through either internships or full-time employment.
- Design technology co-optimization (DTCO).
- Post-Si validation experience.
- Knowledge of the CMOS ASIC design flow.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.About Intel
Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Industry
Manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1968