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New Grad Asic Design Verification Engineer Jobs in Michigan

Stefanini

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Stefanini is looking for a Design Release Engineer, Auburn Hills, MI For quick apply, please reach ... Experience with Design Verification Plan & Report (DVP&R).Design for Six Sigma (DFSS) preferred ...

Stefanini Group

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Stefanini

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Stefanini is looking for a Design Release Engineer, Auburn Hills, MI For quick apply, please reach ... Experience with Design Verification Plan & Report (DVP&R). Design for Six Sigma (DFSS) preferred ...

Stefanini Group

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $42/hr

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Optimal Inc.

Project Engineer

Plymouth, MI · On-site

Scale, modify and refactor existing software components to meet new architecture requirements ... Develop and implement system design verification test procedures to complete safety verification ...

Optimal Inc.

Project Engineer

Plymouth, MI · On-site

Scale, modify and refactor existing software components to meet new architecture requirements ... Develop and implement system design verification test procedures to complete safety verification ...

Stefanini Group

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Stefanini Group

Design Release Engineer

Auburn Hills, MI · On-site

$38 - $43.50/hr

Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ... Master of Science Degree in Engineering. **Listed salary ranges may vary based on experience ...

Optimal Inc.

Project Engineer

Plymouth, MI

Scale, modify and refactor existing software components to meet new architecture requirements ... Develop and implement system design verification test procedures to complete safety verification ...

Zobility

Be Seen First

Fuel Systems Design Release Engineer (DRE)

Auburn Hills, MI · On-site

$38 - $43.50/hr

The Design Release Engineer will interact with suppliers and will work closely with internal and ... Experience with Design Verification Plan & Report (DVP&R). * Design for Six Sigma (DFSS) preferred ...

Stellantis

Design Release Engineer

Auburn Hills, MI

$38 - $43.50/hr

Create, maintain, and manage the Design Verification Plan & Report (DVP&R) and Design Failure Modes ... That's why we offer: 17+ paid holidays, including shut-down from December 24th through New Years ...

Stellantis

Design Release Engineer

Auburn Hills, MI

$38 - $43.50/hr

Create, maintain, and manage the Design Verification Plan & Report (DVP&R) and Design Failure Modes ... That's why we offer: 17+ paid holidays, including shut-down from December 24th through New Years ...

Ford Motor Company

Product Design Engineer

Allen Park, MI · On-site

$81K - $160K/yr

Develop and execute design verification plans (DVPs) and engineering deliverables. Release parts ... Will your career be a deep dive into what you love, or a series of new teams and new skills? Will ...

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All JobsNew Grad Asic Design Verification Engineer JobsNew Grad Asic Design Verification Engineer Jobs in Michigan

New Grad Asic Design Verification Engineer information

What does a new grad ASIC design verification engineer do?

A New Grad ASIC Design Verification Engineer is responsible for testing and validating the design of Application-Specific Integrated Circuits (ASICs) to ensure they meet functional and performance specifications. They typically create testbenches, develop verification plans, write test cases using hardware description languages like SystemVerilog, and debug issues found during simulations. This role is crucial for catching design flaws before manufacturing, working closely with design engineers and using both manual and automated verification methods. As a new graduate, you will learn industry-standard verification methodologies and tools while contributing to the success of the silicon development process.

What are the key skills and qualifications needed to thrive as a new grad ASIC design verification engineer?

To thrive as a New Grad ASIC Design Verification Engineer, you need a solid understanding of digital design principles, hardware description languages (such as Verilog or VHDL), and a relevant degree in electrical or computer engineering. Familiarity with industry-standard verification tools and environments like SystemVerilog, UVM, and simulation/debugging platforms is typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help you excel in diagnosing issues and collaborating with design teams. These skills and qualities ensure robust verification processes that lead to functional, reliable ASIC products.

What is the difference between New Grad Asic Design Verification Engineer vs New Grad Digital Design Engineer?

AspectNew Grad Asic Design Verification EngineerNew Grad Digital Design Engineer
Required SkillsHardware verification, simulation, scripting, HDL knowledgeDigital circuit design, HDL coding, logic design
Work EnvironmentVerification labs, simulation tools, hardware testingDesign teams, FPGA/ASIC development, coding
Industry UsagePrimarily in semiconductor and chip companiesBroadly in electronics, semiconductor, and tech firms

While both roles require HDL knowledge and work in semiconductor environments, the New Grad Asic Design Verification Engineer focuses on verifying and testing ASIC designs, whereas the New Grad Digital Design Engineer is involved in designing digital circuits. Both roles are essential in chip development but differ in their primary responsibilities and skill emphasis.

What are some common challenges new graduates face when starting as an ASIC design verification engineer, and how can they overcome them?

New grad ASIC Design Verification Engineers often encounter challenges such as understanding complex verification environments, learning industry-standard tools and methodologies like UVM, and effectively debugging hardware designs. To overcome these, it's helpful to actively seek mentorship from experienced team members, participate in code reviews, and utilize available documentation and training resources. Collaborating closely with designers and verification leads, asking questions, and consistently practicing hands-on simulations can accelerate learning and build confidence in tackling verification tasks.
What are popular job titles related to New Grad Asic Design Verification Engineer jobs in Michigan? For New Grad Asic Design Verification Engineer jobs in Michigan, the most frequently searched job titles are:
What job categories do people searching New Grad Asic Design Verification Engineer jobs in Michigan look for? The top searched job categories for New Grad Asic Design Verification Engineer jobs in Michigan are:
What cities in Michigan are hiring for New Grad Asic Design Verification Engineer jobs? Cities in Michigan with the most New Grad Asic Design Verification Engineer job openings:
New Grad Asic Design Verification Engineer jobs near you
Infographic showing various New Grad Asic Design Verification Engineer job openings in Michigan as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution.

Design Release Engineer

Stefanini

Auburn Hills, MI • On-site

$38 - $43.50/hr

Other

Re-posted 21 days ago

Job description


Stefanini Group is hiring!
Stefanini is looking for a Design Release Engineer, Auburn Hills, MI
For quick apply, please reach out to Lovkesh Bharti at /
Design Release Engineer will be responsible for the design, development, timing and production release of a system/component within Fuels Systems: Filler pipes, Fuel lines, Fuel Cap & Capless. Other responsibilities will include quality improvements, value optimization, weight reduction and other efficiency improvement initiatives including communicating technical product status to management. The Design Release Engineer will interact with suppliers and will work closely with internal and external groups such as testing and prototype labs, Design Team, CAE engineers, vehicle program team, supplier operations and manufacturing plants.
ResponsibilitiesDeliver all program milestone requirements on time and with qualityManage design changes to components and resolve functional, durability, assembly issues as requiredUtilize engineering tools such as DFMEA, PFMEA, DVP&R, application & adherence of specifications & best practicesLead technical design reviews for components at key program milestones and at management reviewsReview validation setup at internal location or supplier, ensuring testing is performed to specification, review test results for accuracy and compliance requirements and report results to managementCollaborate with cross functional teams (safety, packaging, program, design, advanced manufacturing) to ensure robust design of fuel components through program milestones & launchBe on site at production plant & engineering office to support builds and issue resolutionEnsure quality post program launch by supporting warranty reviews
Experience RequiredSelf-starter with strong leadership, communication & organizational skills and demonstrated problem solving ability.Experience in the following areas would be beneficial: Formula SAE, Baja, or similar experience in college.
Experience Preferred5 or more years of design/development automotive engineering experience in Fuel Systems and/or UREA, will consider an internship with Fuel/Urea Systems as part of that experience as well as Plant Quality/Manufacturing Engineering experience.Prototype experience.Experience with Design Failure Mode & Effects Analysis (DFMEA).Experience with Design Verification Plan & Report (DVP&R).Design for Six Sigma (DFSS) preferred Belt certification.Solid understanding of system/component design.General understanding of NX, TeamCenter and Bill of Material Management (EBOM/Codep/PLM/Other).
Education RequiredBachelor of Science degree in Mechanical Engineering, Mechatronics or Electrical Engineering or related degree field.
Education PreferredMaster of Science Degree in Engineering.
**Listed salary ranges may vary based on experience, qualifications, and local market. Also, some positions may include bonuses or other incentives***
Stefanini takes pride in hiring top talent and developing relationships with our future employees. Our talent acquisition teams will never make an offer of employment without having a phone conversation with you. Those face-to-face conversations will involve a description of the job for which you have applied. We will also speak with you about the process, including interviews and job offers.
About Stefanini Group
The Stefanini Group is a global provider of offshore, onshore and near shore outsourcing, IT digital consulting, systems integration, application, and strategic staffing services to Fortune 1000 enterprises around the world. Our presence is in countries like the Americas, Europe, Africa, and Asia, and more than four hundred clients across a broad spectrum of markets, including financial services, manufacturing, telecommunications, chemical services, technology, public sector, and utilities. Stefanini is a CMM level 5, IT consulting company with a global presence. We are a CMM Level 5 company.
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