Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across ...
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across ...
... bandwidth, networking, and storage to influence reference architectures and long-term silicon ... chip design decisions, not just validate them - Small team, high ownership, direct impact on AWS ...
... bandwidth, networking, and storage to influence reference architectures and long-term silicon ... chip design decisions, not just validate them - Small team, high ownership, direct impact on AWS ...
Digital IC Design Engineer
Austin, TX · On-site
$134K/yr
Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register ... processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML ...
Digital IC Design Engineer
Austin, TX · On-site
$134K/yr
Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register ... processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML ...
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data ... Deliver against NVIDIA's internal chip design schedules and activities - your success is measured ...
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data ... Deliver against NVIDIA's internal chip design schedules and activities - your success is measured ...
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data ... Push the limits of what's possible in chip design with models and research harnesses on top of open ...
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data ... Push the limits of what's possible in chip design with models and research harnesses on top of open ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... Hands-on experience building complex Network-on-Chip (NoC) architectures * Strong knowledge of AXI ...
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... Hands-on experience building complex Network-on-Chip (NoC) architectures * Strong knowledge of AXI ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Cupertino, CA · On-site
$150K - $225K/yr
SoC QoS/Fabric Performance Engineer, Platform Architecture Cupertino, California, United States ... Coursework and/or practical experience with network-on-chip architecture and design * Ability to ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Cupertino, CA · On-site
$150K - $225K/yr
SoC QoS/Fabric Performance Engineer, Platform Architecture Cupertino, California, United States ... Coursework and/or practical experience with network-on-chip architecture and design * Ability to ...
ASIC Design Engineer - Networking/ DPU/ AI Systems
Santa Clara, CA · On-site
$175K/yr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... Hands-on experience building complex Network-on-Chip (NoC) architectures * Strong knowledge of AXI ...
ASIC Design Engineer - Networking/ DPU/ AI Systems
Santa Clara, CA · On-site
$175K/yr
We are seeking a Senior ASIC Design Engineer with seasoned experience in the development of high ... Hands-on experience building complex Network-on-Chip (NoC) architectures * Strong knowledge of AXI ...
Microarchitect / RTL Design - Interconnect & Fabric
Palo Alto, CA · On-site
$160K/yr
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a closely related ... Experience with network-on-chip research: adaptive routing, congestion management, topology ...
Microarchitect / RTL Design - Interconnect & Fabric
Palo Alto, CA · On-site
$160K/yr
Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or a closely related ... Experience with network-on-chip research: adaptive routing, congestion management, topology ...
... bandwidth, networking, and storage to influence reference architectures and long-term silicon ... chip design decisions, not just validate them - Small team, high ownership, direct impact on AWS ...
... bandwidth, networking, and storage to influence reference architectures and long-term silicon ... chip design decisions, not just validate them - Small team, high ownership, direct impact on AWS ...
About the team The RTL design team builds the compute datapath, on-chip network, and memory ... About the role SambaNova Systems is looking for a Principal RTL Design Engineer to own the ...
About the team The RTL design team builds the compute datapath, on-chip network, and memory ... About the role SambaNova Systems is looking for a Principal RTL Design Engineer to own the ...
Follow-On Roadmap: Capture design decisions, lessons learned, and architectural rationale to accelerate follow-on chip development. What You Bring Required * BS, MS, or PhD in Electrical Engineering ...
Follow-On Roadmap: Capture design decisions, lessons learned, and architectural rationale to accelerate follow-on chip development. What You Bring Required * BS, MS, or PhD in Electrical Engineering ...
Follow-On Roadmap: Capture design decisions, lessons learned, and architectural rationale to accelerate follow-on chip development. What You BringRequired * BS, MS, or PhD in Electrical Engineering ...
Follow-On Roadmap: Capture design decisions, lessons learned, and architectural rationale to accelerate follow-on chip development. What You BringRequired * BS, MS, or PhD in Electrical Engineering ...
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... Python programming background Preferred Qualifications * Experience developing, maintaining, and ...
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... Python programming background Preferred Qualifications * Experience developing, maintaining, and ...
GPU RTL Design Engineer
Orlando, FL · On-site
Description As a GPU Design Engineer, you will participate in micro-architecture specification and ... Knowledge in one or more areas of cache design, on-chip interconnect network, data compression or ...
GPU RTL Design Engineer
Orlando, FL · On-site
Description As a GPU Design Engineer, you will participate in micro-architecture specification and ... Knowledge in one or more areas of cache design, on-chip interconnect network, data compression or ...
Arteris enables engineering and design teams at the world's most transformative brands to connect ... Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable ...
Quick apply
Arteris enables engineering and design teams at the world's most transformative brands to connect ... Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable ...
Custom SOC IP Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
Design and implement constrained-random and directed SystemVerilog testbenches targeting ... fabrics, network-on-chip (NoC) topologies, and multi-agent SoC integrations. * Collaborate ...
Custom SOC IP Verification Engineer
Santa Clara, CA · On-site
$159K - $195K/yr
Design and implement constrained-random and directed SystemVerilog testbenches targeting ... fabrics, network-on-chip (NoC) topologies, and multi-agent SoC integrations. * Collaborate ...
Emulation Engineer
Campbell, CA · On-site
$150K - $190K/yr
Description Arteris enables engineering and design teams at the world's most transformative brands ... Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable ...
Emulation Engineer
Campbell, CA · On-site
$150K - $190K/yr
Description Arteris enables engineering and design teams at the world's most transformative brands ... Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable ...
MICROARCHITECT AND RTL DESIGN ENGINEER SANTA CLARA, CA About the role: We are seeking a seasoned ... In-depth understanding of on-chip interconnects and NoC's * Experience within Arm ACE/CHI or ...
MICROARCHITECT AND RTL DESIGN ENGINEER SANTA CLARA, CA About the role: We are seeking a seasoned ... In-depth understanding of on-chip interconnects and NoC's * Experience within Arm ACE/CHI or ...
... networking, image processing, and/or interconnects Good understanding of arbitration, address ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
... networking, image processing, and/or interconnects Good understanding of arbitration, address ... with common on-chip bus protocols such as AMBA (AXI, AHB, APB) Experience in front-end ...
Network On Chip Design Engineer information
See salary details
$31K - $42.5K
0% of jobs
$42.5K - $54.1K
1% of jobs
$54.1K - $65.6K
3% of jobs
$65.6K - $77.2K
7% of jobs
$77.2K - $88.7K
12% of jobs
$89.7K is the 25th percentile. Wages below this are outliers.
$88.7K - $100.3K
21% of jobs
The median wage is $104.8K / yr.
$100.3K - $111.8K
15% of jobs
$111.8K - $123.4K
12% of jobs
$129.5K is the 75th percentile. Wages above this are outliers.
$123.4K - $134.9K
8% of jobs
$134.9K - $146.5K
19% of jobs
$146.5K - $158K
2% of jobs
$31K
$109K
$158K
How much do network on chip design engineer jobs pay per year?
As of Sep 10, 2026, the average yearly pay for network on chip design engineer in the United States is $109,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $89,000.00 and $133,500.00 per year, depending on experience, location, and employer.
What are popular job titles related to Network On Chip Design Engineer jobs?
For Network On Chip Design Engineer jobs, the most frequently searched job titles are:
ASIC Design Engineer - Hardware
Austin, TX • On-site
Nvidia Corporation •
Computer and Electronic Product Manufacturing • 10K+ employees10,000+ employees
Full-time
Re-posted 26 days ago
Nvidia rating
9.6
Based on 18 frontline employees who took The Breakroom Quiz
6th of 247 rated software companies
Job description
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across multiple projects!
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world!
What you'll be doing:
What we need to see:
Ways to stand out from the crowd:
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant people in the world working for us and, due to unprecedented growth, our teams are rapidly growing. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until September 6, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world!
What you'll be doing:
- Be an integral part of the team defining, developing, and delivering system-level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs
- Define, develop, and automate flows and methodologies to efficiently build, deliver, and support a system-level IP
- Deliver IP and support projects by applying the performance monitoring system
- Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more)
- Design and implement RTL features (microarchitecture and RTL)
- Work with architects, designers, and software engineers to accomplish your tasks
What we need to see:
- BS or equivalent experience in Electrical Engineering, Computer Engineer, or related degree required, advanced degrees (MS, PhD) a plus
- 2+ years of relevant industry experience and strong coding skills in Perl/Python or other industry-standard scripting languages
- Experience in RTL design (Verilog), verification (SystemVerilog), System-On-Chip design/implementation flow, and design automation
- Good understanding of SOC architecture, including CDC, multiple-power domains, performance analysis, latency, and data flow
- Excellent debugging and analytical skills
- Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
- Great communication and collaboration skills to interact within the team and with cross-functional teams
Ways to stand out from the crowd:
- Hands on experience in object-oriented programming
- Prior design on system level IP (Clocks/DFT/Resets)
- Experience developing methodologies used by others
- Hands- on silicon debug is a plus.
- Exposure to physical design
With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant people in the world working for us and, due to unprecedented growth, our teams are rapidly growing. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.
You will also be eligible for equity and benefits.
Applications for this job will be accepted at least until September 6, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US