GPU RTL Design Engineer
Orlando, FL · On-site
Description As a GPU Design Engineer, you will participate in micro-architecture specification and ... on-chip interconnect network, data compression or shader processor Understanding of high ...
GPU RTL Design Engineer
Orlando, FL · On-site
Description As a GPU Design Engineer, you will participate in micro-architecture specification and ... on-chip interconnect network, data compression or shader processor Understanding of high ...
RF Passive Design Engineer
San Diego, CA · On-site
You will be responsible for on chip inductors / transformers/ caps/ transmission lines designs, as ... D/Process engineering multi-functional teams to architect and develop future RF on chip passives.
RF Passive Design Engineer
San Diego, CA · On-site
You will be responsible for on chip inductors / transformers/ caps/ transmission lines designs, as ... D/Process engineering multi-functional teams to architect and develop future RF on chip passives.
CPU Design Methodology Engineer
OR · On-site +1
We are now looking for a Senior CPU Design Methodology Engineer. The complexity of chip development ... On-Chip design/integration flow, and design automation Strong coding skills in Perl, Python, or ...
CPU Design Methodology Engineer
OR · On-site +1
We are now looking for a Senior CPU Design Methodology Engineer. The complexity of chip development ... On-Chip design/integration flow, and design automation Strong coding skills in Perl, Python, or ...
We are now looking for a Senior CPU Design Methodology Engineer. The complexity of chip development ... On-Chip design/integration flow, and design automation Strong coding skills in Perl, Python, or ...
We are now looking for a Senior CPU Design Methodology Engineer. The complexity of chip development ... On-Chip design/integration flow, and design automation Strong coding skills in Perl, Python, or ...
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development ... Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design ...
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development ... Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Austin, TX · On-site
$184K - $277K/yr
... network-on-chip architecture and design is a big plus Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Austin, TX · On-site
$184K - $277K/yr
... network-on-chip architecture and design is a big plus Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Austin, TX · On-site
$184K - $277K/yr
... network-on-chip architecture and design is a big plus Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Austin, TX · On-site
$184K - $277K/yr
... network-on-chip architecture and design is a big plus Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture ...
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development ... Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design ...
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development ... Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design ...
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development ... Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design ...
We are now looking for a Senior CPU Design Methodology Engineer! The complexity of chip development ... Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design ...
We are now looking for a Senior CPU Design Methodology Engineer. The complexity of chip development ... On-Chip design/integration flow, and design automation Strong coding skills in Perl, Python, or ...
We are now looking for a Senior CPU Design Methodology Engineer. The complexity of chip development ... On-Chip design/integration flow, and design automation Strong coding skills in Perl, Python, or ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Cupertino, CA · On-site
$150K - $225K/yr
... network-on-chip architecture and design Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture Communication and ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Cupertino, CA · On-site
$150K - $225K/yr
... network-on-chip architecture and design Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture Communication and ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Cupertino, CA · On-site
$150K - $225K/yr
... network-on-chip architecture and design Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture Communication and ...
SoC QoS/Fabric Performance Engineer, Platform Architecture
Cupertino, CA · On-site
$150K - $225K/yr
... network-on-chip architecture and design Ability to study a problem in depth, design experiments, analyze data, and present results Experience with Cellular/5G modem architecture Communication and ...
CAD Engineer - Design Verification Methodology
Austin, TX · On-site
$134K - $164K/yr
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... Minimum Qualifications Minimum of BS degree + 3 years of relevant experience Python programming ...
CAD Engineer - Design Verification Methodology
Austin, TX · On-site
$134K - $164K/yr
... system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently ... Minimum Qualifications Minimum of BS degree + 3 years of relevant experience Python programming ...
Senior Digital Design Engineer
Austin, TX · On-site
... network-on-chip, arbiters and schedulers etc. Deep understanding of ASIC design flows and ... growth, our special engineering teams are growing fast. If you're a creative and autonomous ...
Senior Digital Design Engineer
Austin, TX · On-site
... network-on-chip, arbiters and schedulers etc. Deep understanding of ASIC design flows and ... growth, our special engineering teams are growing fast. If you're a creative and autonomous ...
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data ... Deliver against NVIDIA's internal chip design schedules and activities - your success is measured ...
Hands-on experience with LLMs, RL, RLHF/RLAIF, post-training, evaluation, graders, synthetic data ... Deliver against NVIDIA's internal chip design schedules and activities - your success is measured ...
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across ...
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across ...
... on chip design experience, with a focus on SOC integration and automation * Strong analytical and problem-solving skills * Expertise in RTL design, SOC integration, and design automation flows
... on chip design experience, with a focus on SOC integration and automation * Strong analytical and problem-solving skills * Expertise in RTL design, SOC integration, and design automation flows
... bandwidth, networking, and storage to influence reference architectures and long-term silicon ... chip design decisions, not just validate them - Small team, high ownership, direct impact on AWS ...
... bandwidth, networking, and storage to influence reference architectures and long-term silicon ... chip design decisions, not just validate them - Small team, high ownership, direct impact on AWS ...
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across ...
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across ...
... on chip design experience, with a focus on SOC integration and automation Strong analytical and problem-solving skills Expertise in RTL design, SOC integration, and design automation flows ...
... on chip design experience, with a focus on SOC integration and automation Strong analytical and problem-solving skills Expertise in RTL design, SOC integration, and design automation flows ...
Network On Chip Design Engineer information
See salary details
$31K - $42.5K
0% of jobs
$42.5K - $54.1K
1% of jobs
$54.1K - $65.6K
3% of jobs
$65.6K - $77.2K
7% of jobs
$77.2K - $88.7K
12% of jobs
$89.7K is the 25th percentile. Wages below this are outliers.
$88.7K - $100.3K
21% of jobs
The median wage is $104.8K / yr.
$100.3K - $111.8K
15% of jobs
$111.8K - $123.4K
12% of jobs
$129.5K is the 75th percentile. Wages above this are outliers.
$123.4K - $134.9K
8% of jobs
$134.9K - $146.5K
19% of jobs
$146.5K - $158K
2% of jobs
$31K
$109K
$158K
How much do network on chip design engineer jobs pay per year?
As of Sep 10, 2026, the average yearly pay for network on chip design engineer in the United States is $109,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $89,000.00 and $133,500.00 per year, depending on experience, location, and employer.
What are popular job titles related to Network On Chip Design Engineer jobs?
For Network On Chip Design Engineer jobs, the most frequently searched job titles are:
GPU RTL Design Engineer
Orlando, FL • On-site
Apple
• Computer and Electronic Product Manufacturing • 10K+ employees10,000+ employees
Full-time
Posted 28 days ago
Apple rating
8.1
Based on 684 frontline employees who took The Breakroom Quiz
Job description
Do you love creating elegant solutions to highly complex challenges? As part of our Silicon Technologies group, you’ll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You’ll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions! Join us to help deliver the next groundbreaking products containing an Apple designed GPU. As part of the GPU RTL Design team, you’ll be responsible for crafting and building a GPU that enriches the lives of millions of people every day!
Description
As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade-offs in performance, area and power consumption. You will collaborate with verification team for functional simulation and debug. You will go beyond the industry norm and demonstrate creativity in problem solving, ability to think dynamically outside of standard convention, and quickly adapt to new technical areas.
Preferred Qualifications
Knowledge of logic design fundamentals
Knowledge of computer architecture fundamentals
Knowledge of CPU or GPU architecture
Knowledge in one or more areas of cache design, on-chip interconnect network, data compression or shader processor
Understanding of high performance, low power designs
Experience with scripting languages such as Perl, Python and Ruby
Ability to work well in a team with excellent communication skills
Minimum Qualifications
Experience with Verilog, SystemVerilog and HDL
Minimum of BS degree
Description
As a GPU Design Engineer, you will participate in micro-architecture specification and RTL coding. Explore architecture trade-offs in performance, area and power consumption. You will collaborate with verification team for functional simulation and debug. You will go beyond the industry norm and demonstrate creativity in problem solving, ability to think dynamically outside of standard convention, and quickly adapt to new technical areas.
Preferred Qualifications
Knowledge of logic design fundamentals
Knowledge of computer architecture fundamentals
Knowledge of CPU or GPU architecture
Knowledge in one or more areas of cache design, on-chip interconnect network, data compression or shader processor
Understanding of high performance, low power designs
Experience with scripting languages such as Perl, Python and Ruby
Ability to work well in a team with excellent communication skills
Minimum Qualifications
Experience with Verilog, SystemVerilog and HDL
Minimum of BS degree
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976