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Mask Design Engineer Jobs (NOW HIRING)

Analog Layout Design Engineer

Santa Clara, CA ยท On-site

$237.20K/yr

Job Title: Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 ... Utilizing advanced CAD tools and mask design knowledge to deliver correct and robust layout that ...

PLL Design Engineer

Sunnyvale, CA

$181.10K - $318.40K/yr

We are seeking a highly skilled PLL Design Engineer to join our engineering team. The ideal ... Working closely with the mask design team to implement layout views of designs. Preferred ...

PLL Design Engineer

Sunnyvale, CA

$126.80K - $220.90K/yr

We are seeking a highly skilled PLL Design Engineer to join our engineering team. The ideal ... Working closely with the mask design team to implement layout views of designs. Preferred ...

RF/Analog Mixed Signal Design Engineer

Cupertino, CA ยท On-site

$181.10K - $318.40K/yr

Drive mask design to implement layout views of designs and drive layout reviews. Run post-layout ... Experience in working with production test engineers to produce test plans and design for ...

PIC Engineering Reports to: Senior Director, PIC Engineering About Us Quantum Computing Inc. (QCi ... Drive process integration efforts including mask design, fabrication flow development, and ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... Bachelor's of Science in Electric Engineering Required. Do you have a proven track record of taking ...

The DRAM Design Engineering Group (DDEG) develops advanced memory solutions by tightly integrating ... tapeout and mask generation while maintaining quality standards. * Lead layout planning for ...

The DRAM Design Engineering Group (DDEG) develops advanced memory solutions by tightly integrating ... tapeout and mask generation while maintaining quality standards. * Lead layout planning for ...

The DRAM Design Engineering Group (DDEG) develops advanced memory solutions by tightly integrating ... tapeout and mask generation while maintaining quality standards. * Lead layout planning for ...

Design and Development: Create layout designs for critical circuits, ensuring compliance with ... Coordinate with global partners to meet predictable schedules and support tapeout/mask generation ...

The DRAM Design Engineering Group (DDEG) develops advanced memory solutions by tightly integrating ... tapeout and mask generation while maintaining quality standards. * Lead layout planning for ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... Bachelor's of Science in Electric Engineering with 10+ years of relevant experience preferred Do ...

As a Wireless Design Engineer, you will be responsible for RTL design of wireless MAC and its interface with the rest of the wireless SoC. You will interact with the software team, wireless system ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... Bachelor's of Science in Electric Engineering Required. Do you have a proven track record of taking ...

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Mask Design Engineer information

See salary details

$45K

$120.8K

$185.5K

How much do mask design engineer jobs pay per year?

As of May 29, 2026, the average yearly pay for mask design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Mask Design Engineer, and why are they important?

To thrive as a Mask Design Engineer, you need expertise in semiconductor device physics, layout design, and photolithography, typically supported by a degree in electrical engineering or a related field. Familiarity with CAD tools such as Cadence Virtuoso, Calibre, and other EDA software, as well as knowledge of industry standards like DRC/LVS checks, is essential. Attention to detail, problem-solving skills, and effective communication help ensure accuracy and collaboration within engineering teams. These skills and qualifications are critical for producing precise mask layouts that enable successful chip fabrication and yield.

What are some common challenges faced by Mask Design Engineers during the IC layout process?

Mask Design Engineers often encounter challenges such as adhering to strict design rules while maximizing layout efficiency and yield. They must manage complex design data, collaborate closely with circuit designers to implement feedback, and ensure that the mask layouts are optimized for both manufacturability and performance. Additionally, keeping up with evolving technology nodes and lithography constraints requires continuous learning and adaptation. Effective communication and attention to detail are crucial for overcoming these challenges and delivering high-quality mask designs on tight schedules.

What are Mask Design Engineers?

Mask Design Engineers are specialized professionals who create photomasks used in the fabrication of semiconductor devices. They use advanced computer-aided design (CAD) tools to translate circuit layouts into precise patterns that guide the manufacturing of microchips. These engineers work closely with circuit designers and fabrication teams to ensure accuracy and efficiency in chip production. Their expertise is crucial for achieving the high levels of miniaturization and performance required in modern electronics.

What is the difference between Mask Design Engineer vs Photomask Fabrication Engineer?

AspectMask Design EngineerPhotomask Fabrication Engineer
Primary RoleDesigns photomasks used in semiconductor manufacturingManufactures and inspects photomasks based on design specifications
Skills & CertificationsKnowledge of CAD tools, semiconductor processes, optical designExperience with lithography, cleanroom protocols, quality control
Work EnvironmentDesign labs, CAD rooms, collaboration with chip designersCleanrooms, fabrication facilities, equipment operation
Industry UsageUsed in semiconductor and electronics manufacturingUsed in photomask production for chip fabrication

While both roles are essential in semiconductor manufacturing, the Mask Design Engineer focuses on creating the design files for photomasks, whereas the Photomask Fabrication Engineer handles the physical production and quality control of these masks. Both positions require specialized skills and work closely within the same industry but serve different stages of the mask creation process.

More about Mask Design Engineer jobs
What cities are hiring for Mask Design Engineer jobs? Cities with the most Mask Design Engineer job openings:
Who are the top companies hiring for Mask Design Engineer jobs? The top employers for Mask Design Engineer jobs are:
What states have the most Mask Design Engineer jobs? States with the most job openings for Mask Design Engineer jobs include:
What are popular job titles related to Mask Design Engineer jobs? For Mask Design Engineer jobs, the most frequently searched job titles are:
Infographic showing various Mask Design Engineer job openings in the United States as of May 2026, with employment types broken down into 95% Full Time, and 5% Part Time. Highlights an 95% Physical, and 5% Hybrid job distribution, with an average salary of $120,849 per year, or $58.1 per hour.

Design Integration Engineer (49386)

TDK Headway Technologies Inc.

Milpitas, CA โ€ข On-site

$118.60K - $159.60K/yr

Full-time

Posted 18 days ago


Job description

TITLE:ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย ย  DESIGN INTEGRATION ENGINEER

FLSA STATUS:ย ย ย ย ย ย ย ย ย  EXEMPT

REPORTS TO:ย ย ย ย ย ย ย ย ย  DIRECTOR, DESIGN INTEGRATION

SUMMARY:ย ย ย ย ย ย ย ย ย ย ย ย ย ย 

Under the direction of the Director of Design Integration, the Design Integration Engineer is responsible for the mask design and layout of thin film recording heads, including tracking wafer schedules, providing mask design requirements for new or existing wafers, and managing the communication between fab expeditors and design integration to minimize wafer holds.

ESSENTIAL FUNCTIONS:

  • Designs and delivers masks and layouts for thin film recording heads
  • Tracks wafer schedules, mask manufacturing progress in the fab, and vendor interactions to ensure just-in-time delivery of masks, tools, or wafers
  • Updates, creates, and maintains CAD libraries for layouts as needed
  • Integrates new recording head designs into the existing design libraries based upon job or customer specifications
  • Maintains, updates, and documents all design reference materials; ensures readiness of manufacturing materials as needed
  • Reviews and analyzes data, creates reports, and presents findings to groups, teams, or departments as required
  • Uses knowledge of TMR, PMR, MAMR or HAMR design integration issues, layouts, and wafer processing to ensure masks are designed efficiently and cost effectively
  • Interacts with and responds to inquiries from other product groups regarding manufacturing-related issues and product or device modifications or requirements
  • Adheres to all safety policies and procedures as required
  • Performs other duties of a similar nature or level*

MINIMUM QUALIFICATIONS:

  • Bachelorโ€™s degree in Electrical or Mechanical Engineering and/or equivalent relevant experience; Masterโ€™s degree preferred
  • One to three years of hands-on experience working in the thin film recording head or semiconductor industry in a mask design role
  • Experience using CAD software such as DW-2000 or AutoCAD
  • Proficient in the use of Microsoft Office Applications

Knowledge, Skills, and Abilities:

  • Knowledge of thin film recording head manufacturing or semiconductor processes, practices, and techniques
  • Knowledge and ability to use CAD or similar software to create complex masks and layouts for use in thin film recording heads
  • Knowledge and ability to use Microsoft Office applications to create spreadsheets, Word documents, and presentations
  • Ability to manage and track wafer schedules, projects, and design changes efficiently to ensure just-in-time delivery of materials or wafers
  • Ability to create various reports, presentations, and written sample analysis
  • Ability to communicate effectively, both verbally and in writing, with all levels of contractors, consultants, employees, vendors, and management
  • Ability to work productively and collaboratively with all levels of employees and management
  • Ability to comply with all safety policies and procedures
  • Demonstrated organizational and time management skills
  • Demonstrated problem-solving and trouble shooting skills
  • Flexible and able to prioritize

The hourly rate for this full-time position is between $92,930.00-$136,661.00 + bonus target + benefits. Within the range the individual pay may differ depending on additional factors including job responsibilities, job related knowledge, skills, abilities, education, and experience. The hourly pay range shown is subject to change and may be modified periodically.

WORKING CONDITIONS:

The Design Integration Engineer works primarily in an indoor environment from Monday thru Friday. The schedule may be altered from time-to-time to meet business or operational needs; may travel from building-to-building as needed. Spends a majority of time in a seated position, but occasionally stands and walks; performs various fine grasping movements, bends, and twists; operates a computer and enters information using a keyboard, operates a telephone, and other office equipment. May occasionally be required to push, pull, or lift up to 10 or more pounds.

*Other duties of a similar nature or level are duties that may be required, but may not be specifically listed in the job description or posting.

TDK/Headway Technologies, Inc. provides equal employment opportunities (EEO) to all employees and applicants for employment without regard to race, color, religion, gender, national origin, age, disability, or genetics.ย  Applicants requiring accommodation in order to complete the application process should contact the Headway Human Resources Department.