Responsibilities include all aspects of IC mask design from creating full chip floor plans ... Computer programming / coding a plus Key learning objectives of the program: * Use Cadence Virtuoso ...
Responsibilities include all aspects of IC mask design from creating full chip floor plans ... Computer programming / coding a plus Key learning objectives of the program: * Use Cadence Virtuoso ...
Responsibilities include all aspects of IC mask design from creating full chip floor plans ... Computer programming / coding a plus Key learning objectives of the program: * Use Cadence Virtuoso ...
Responsibilities include all aspects of IC mask design from creating full chip floor plans ... Computer programming / coding a plus Key learning objectives of the program: * Use Cadence Virtuoso ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Principal Device Design Engineer
Tempe, AZ · On-site
$140 - $190/hr
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Principal Device Design Engineer
Tempe, AZ · On-site
$140 - $190/hr
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Quick apply
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
Execute test mask and product mask layouts with support from CAE team * Identify testing ... to optimize device design and process * Provide engineering support for existing power ...
As a Photomask Process/Equipment Engineer, you will demonstrate a strong sense of reliability and ... of mask data preparation environment * New IT architecture design and project management
As a Photomask Process/Equipment Engineer, you will demonstrate a strong sense of reliability and ... of mask data preparation environment * New IT architecture design and project management
As a Photomask Process/Equipment Engineer, you will demonstrate a strong sense of reliability and ... of mask data preparation environment * New IT architecture design and project management
As a Photomask Process/Equipment Engineer, you will demonstrate a strong sense of reliability and ... of mask data preparation environment * New IT architecture design and project management
As a Photomask Process/Equipment Engineer, you will demonstrate a strong sense of reliability and ... of mask data preparation environment * New IT architecture design and project management
As a Photomask Process/Equipment Engineer, you will demonstrate a strong sense of reliability and ... of mask data preparation environment * New IT architecture design and project management
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...
Lead Data & AI Engineer
Phoenix, AZ · On-site +1
$50 - $60/hr
Your role · Design, implement, and optimize data platforms using Snowflake and Microsoft Fabric ... masking, tokenization, and de-identification. · Create conceptual, logical, and physical data ...
Quick apply
Lead Data & AI Engineer
Phoenix, AZ · On-site +1
$50 - $60/hr
Your role · Design, implement, and optimize data platforms using Snowflake and Microsoft Fabric ... masking, tokenization, and de-identification. · Create conceptual, logical, and physical data ...
Sr. Machine Learning Engineer
Phoenix, AZ · On-site
$130K - $150K/yr
... Mask Inspection Tools. Responsibilities include eliminating hardware bottlenecks through CUDA ... Design, implement, and optimize high-throughput, low-latency image processing pipelines for real ...
Sr. Machine Learning Engineer
Phoenix, AZ · On-site
$130K - $150K/yr
... Mask Inspection Tools. Responsibilities include eliminating hardware bottlenecks through CUDA ... Design, implement, and optimize high-throughput, low-latency image processing pipelines for real ...
AI Prompt Engineer
Chandler, AZ · On-site
Responsibilities : • Design, test, and refine advanced system, user, and tool prompts for ... PII masking, and access control in AI workflows. • Collaborate with Risk, Legal, and Compliance ...
AI Prompt Engineer
Chandler, AZ · On-site
Responsibilities : • Design, test, and refine advanced system, user, and tool prompts for ... PII masking, and access control in AI workflows. • Collaborate with Risk, Legal, and Compliance ...
Senior Data & AI Engineer
Phoenix, AZ · On-site
$100K - $136K/yr
... access, masking, tokenization, de‑identification). Data Modeling & Integration * Design ... Machine learning: feature engineering, model training/evaluation, and deployment (e.g ...
Senior Data & AI Engineer
Phoenix, AZ · On-site
$100K - $136K/yr
... access, masking, tokenization, de‑identification). Data Modeling & Integration * Design ... Machine learning: feature engineering, model training/evaluation, and deployment (e.g ...
Senior Data & AI Engineer
Phoenix, AZ · Remote
$100K - $136K/yr
Position Profile The Senior Data & AI Engineer will need to have deep handson experience in ... masking, tokenization, deidentification). Data Modeling & Integration * Design conceptual/logical ...
Senior Data & AI Engineer
Phoenix, AZ · Remote
$100K - $136K/yr
Position Profile The Senior Data & AI Engineer will need to have deep handson experience in ... masking, tokenization, deidentification). Data Modeling & Integration * Design conceptual/logical ...
Mask Design Engineer information
See Phoenix, AZ salary details
$44.7K - $57.4K
4% of jobs
$57.4K - $70K
2% of jobs
$70K - $82.7K
12% of jobs
$93K is the 25th percentile. Wages below this are outliers.
$82.7K - $95.4K
9% of jobs
$95.4K - $108.1K
11% of jobs
The median wage is $119.8K / yr.
$108.1K - $120.8K
14% of jobs
$120.8K - $133.5K
22% of jobs
$135.8K is the 75th percentile. Wages above this are outliers.
$133.5K - $146.1K
9% of jobs
$146.1K - $158.8K
9% of jobs
$158.8K - $171.5K
3% of jobs
$171.5K - $184.2K
6% of jobs
$44.7K
$120K
$184.2K
How much do mask design engineer jobs pay per year?
What are some common challenges faced by mask design engineers during the IC layout process?
What is the difference between Mask Design Engineer vs Photomask Fabrication Engineer?
| Aspect | Mask Design Engineer | Photomask Fabrication Engineer |
|---|---|---|
| Primary Role | Designs photomasks used in semiconductor manufacturing | Manufactures and inspects photomasks based on design specifications |
| Skills & Certifications | Knowledge of CAD tools, semiconductor processes, optical design | Experience with lithography, cleanroom protocols, quality control |
| Work Environment | Design labs, CAD rooms, collaboration with chip designers | Cleanrooms, fabrication facilities, equipment operation |
| Industry Usage | Used in semiconductor and electronics manufacturing | Used in photomask production for chip fabrication |
While both roles are essential in semiconductor manufacturing, the Mask Design Engineer focuses on creating the design files for photomasks, whereas the Photomask Fabrication Engineer handles the physical production and quality control of these masks. Both positions require specialized skills and work closely within the same industry but serve different stages of the mask creation process.
What are the key skills and qualifications needed to thrive as a mask design engineer?
What is a mask design engineer?
What are popular job titles related to Mask Design Engineer jobs in Phoenix, AZ?
For Mask Design Engineer jobs in Phoenix, AZ, the most frequently searched job titles are:
What job categories do people searching Mask Design Engineer jobs in Phoenix, AZ look for?
The top searched job categories for Mask Design Engineer jobs in Phoenix, AZ are:

Full-time
Posted 24 days ago
Job description
Come join Analog Devices (ADI) - a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.
ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.comand on LinkedIn and X.
Job Description:
The Automotive Solutions Group needs entry level computer draftsman interested in learning mask design for advanced analog and mixed-signal ICs. You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects.
Responsibilities include all aspects of IC mask design from creating full chip floor plans, planning schedules, hookup, and verification to tape out. On the job training provided to develop your skills.
Minimum Qualifications:
Comfortable with computers and working on a computer continuously as a full-time job.
Good written and verbal communication skills
Good puzzle solving skills
Good spatial awareness skills
Eager to learn with strong memory retention skills
Ability to work well in a team environment
Accepting of change that comes from innovation
Detail-oriented
Preferred Qualifications:
High school graduate or equivalent (General Education Diploma).
At least eighteen years old.
Computer programming / coding a plus
Key learning objectives of the program:
Use Cadence Virtuoso Layout XL editor
Generate high-quality placements.
Carefully and methodically route sub-cells and blocks.
Basic Power Fet metallization.
LVS, DRC, Latchup and Antenna Verification using Calibre
Gain ability to work on layouts independently.
Basic proficiency using Linux
What are the key competencies required to be successful on the program?
Comfortable with computers and working on a computer continuously as a full-time job.
Good written and verbal communication skills
Good puzzle solving skills
Good spatial awareness skills
Eager to learn with strong memory retention skills
Ability to work well in a team environment
Ability to embrace change
Detail-oriented
Schedule meetings with SLD's to ask questions and gain knowledge
Spend time studying things you need to understand
Length of the program
6-month training period with a purpose of progressing in the Layout Career Path.
What training will be provided?
A class-style setting and seating arrangement with assignments and exams to show retention of learning. Multiple mentors to help give a well-rounded learning experience. Exams will not test beyond what has been taught.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: Graduate JobRequired Travel: No