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Mask Design Engineer Jobs in Phoenix, AZ (NOW HIRING)

Distinguished Engineer - AI Security

Phoenix, AZ · On-site

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...

Distinguished Engineer - AI Security

Phoenix, AZ

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...

Distinguished Engineer - AI Security

Phoenix, AZ

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...

Distinguished Engineer - AI Security

Phoenix, AZ

  • Medical

  • Dental

  • Vision

  • Retirement

  • PTO

Lead the design, development, and implementation of innovative software solutions, platforms, and ... Implement encryption, tokenization, data masking, and privacy preserving controls to protect ...

Lead Data & AI Engineer

Phoenix, AZ · On-site +1

$50 - $60/hr

Your role · Design, implement, and optimize data platforms using Snowflake and Microsoft Fabric ... masking, tokenization, and de-identification. · Create conceptual, logical, and physical data ...

Sr. Machine Learning Engineer

Phoenix, AZ · On-site

$130K - $150K/yr

... Mask Inspection Tools. Responsibilities include eliminating hardware bottlenecks through CUDA ... Design, implement, and optimize high-throughput, low-latency image processing pipelines for real ...

Responsibilities : • Design, test, and refine advanced system, user, and tool prompts for ... PII masking, and access control in AI workflows. • Collaborate with Risk, Legal, and Compliance ...

Senior Data & AI Engineer

Phoenix, AZ · On-site

$100K - $136K/yr

  • PTO

... access, masking, tokenization, de‑identification). Data Modeling & Integration * Design ... Machine learning: feature engineering, model training/evaluation, and deployment (e.g ...

Senior Data & AI Engineer

Phoenix, AZ · Remote

$100K - $136K/yr

  • PTO

Position Profile The Senior Data & AI Engineer will need to have deep handson experience in ... masking, tokenization, deidentification). Data Modeling & Integration * Design conceptual/logical ...

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Showing results 1-20

Mask Design Engineer information

See Phoenix, AZ salary details

$44.7K

$120K

$184.2K

How much do mask design engineer jobs pay per year?

As of Aug 14, 2026, the average yearly pay for mask design engineer in Phoenix, AZ is $119,992.00, according to ZipRecruiter salary data. Most workers in this role earn between $89,400.00 and $143,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by mask design engineers during the IC layout process?

Mask Design Engineers often encounter challenges such as adhering to strict design rules while maximizing layout efficiency and yield. They must manage complex design data, collaborate closely with circuit designers to implement feedback, and ensure that the mask layouts are optimized for both manufacturability and performance. Additionally, keeping up with evolving technology nodes and lithography constraints requires continuous learning and adaptation. Effective communication and attention to detail are crucial for overcoming these challenges and delivering high-quality mask designs on tight schedules.

What is the difference between Mask Design Engineer vs Photomask Fabrication Engineer?

AspectMask Design EngineerPhotomask Fabrication Engineer
Primary RoleDesigns photomasks used in semiconductor manufacturingManufactures and inspects photomasks based on design specifications
Skills & CertificationsKnowledge of CAD tools, semiconductor processes, optical designExperience with lithography, cleanroom protocols, quality control
Work EnvironmentDesign labs, CAD rooms, collaboration with chip designersCleanrooms, fabrication facilities, equipment operation
Industry UsageUsed in semiconductor and electronics manufacturingUsed in photomask production for chip fabrication

While both roles are essential in semiconductor manufacturing, the Mask Design Engineer focuses on creating the design files for photomasks, whereas the Photomask Fabrication Engineer handles the physical production and quality control of these masks. Both positions require specialized skills and work closely within the same industry but serve different stages of the mask creation process.

What are the key skills and qualifications needed to thrive as a mask design engineer?

To thrive as a Mask Design Engineer, you need expertise in semiconductor device physics, layout design, and photolithography, typically supported by a degree in electrical engineering or a related field. Familiarity with CAD tools such as Cadence Virtuoso, Calibre, and other EDA software, as well as knowledge of industry standards like DRC/LVS checks, is essential. Attention to detail, problem-solving skills, and effective communication help ensure accuracy and collaboration within engineering teams. These skills and qualifications are critical for producing precise mask layouts that enable successful chip fabrication and yield.

What is a mask design engineer?

Mask Design Engineers are specialized professionals who create photomasks used in the fabrication of semiconductor devices. They use advanced computer-aided design (CAD) tools to translate circuit layouts into precise patterns that guide the manufacturing of microchips. These engineers work closely with circuit designers and fabrication teams to ensure accuracy and efficiency in chip production. Their expertise is crucial for achieving the high levels of miniaturization and performance required in modern electronics.
Infographic showing various Mask Design Engineer job openings in Phoenix, AZ as of August 2026, with employment types broken down into 1% Internship, 89% Full Time, 5% Part Time, and 5% Contract. Highlights an 84% Physical, 5% Hybrid, and 11% Remote job distribution, with an average salary of $119,992 per year, or $57.7 per hour.

Junior Layout Design Engineer (Trainee)

Analogdevices

Chandler, AZ

Full-time

Posted 24 days ago


Job description

Come join Analog Devices (ADI) - a place where Innovation meets Impact. For more than 55 years, Analog Devices has been inventing new breakthrough technologies that transform lives. At ADI you will work alongside the brightest minds to collaborate on solving complex problems that matter from autonomous vehicles, drones and factories to augmented reality and remote healthcare.


ADI fosters a culture that focuses on employees through beneficial programs, aligned goals, continuous learning opportunities, and practices that create a more sustainable future.


About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.comand on LinkedIn and X.

Job Description:

The Automotive Solutions Group needs entry level computer draftsman interested in learning mask design for advanced analog and mixed-signal ICs. You will work as a team with layout designers and engineers, local and/or globally to complete full chip projects.
Responsibilities include all aspects of IC mask design from creating full chip floor plans, planning schedules, hookup, and verification to tape out. On the job training provided to develop your skills.

Minimum Qualifications:

  • Comfortable with computers and working on a computer continuously as a full-time job.

  • Good written and verbal communication skills

  • Good puzzle solving skills

  • Good spatial awareness skills

  • Eager to learn with strong memory retention skills

  • Ability to work well in a team environment

  • Accepting of change that comes from innovation

  • Detail-oriented

Preferred Qualifications:

  • High school graduate or equivalent (General Education Diploma).

  • At least eighteen years old.

  • Computer programming / coding a plus

Key learning objectives of the program:

  • Use Cadence Virtuoso Layout XL editor

  • Generate high-quality placements.

  • Carefully and methodically route sub-cells and blocks.

  • Basic Power Fet metallization.

  • LVS, DRC, Latchup and Antenna Verification using Calibre

  • Gain ability to work on layouts independently.

  • Basic proficiency using Linux

What are the key competencies required to be successful on the program?

  • Comfortable with computers and working on a computer continuously as a full-time job.

  • Good written and verbal communication skills

  • Good puzzle solving skills

  • Good spatial awareness skills

  • Eager to learn with strong memory retention skills

  • Ability to work well in a team environment

  • Ability to embrace change

  • Detail-oriented

  • Schedule meetings with SLD's to ask questions and gain knowledge

  • Spend time studying things you need to understand

Length of the program

6-month training period with a purpose of progressing in the Layout Career Path.

What training will be provided?

A class-style setting and seating arrangement with assignments and exams to show retention of learning. Multiple mentors to help give a well-rounded learning experience. Exams will not test beyond what has been taught.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: Graduate JobRequired Travel: No