We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency ...
Mixed Signal Logic Design Engineer
Santa Clara, CA · On-site
$122K - $232K/yr
Medical
Retirement
PTO
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed signal ... Ability to collaborate across diverse teams, mentor junior engineers, and contribute to a dynamic ...
Mixed Signal Logic Design Engineer
Santa Clara, CA · On-site
$122K - $232K/yr
Medical
Retirement
PTO
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed signal ... Ability to collaborate across diverse teams, mentor junior engineers, and contribute to a dynamic ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency ...
We are now looking for a Senior Logic Design Engineer! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency ...
Mixed Signal Logic Design Engineer
San Jose, CA · On-site
$122K - $232K/yr
Medical
Retirement
PTO
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed signal ... Ability to collaborate across diverse teams, mentor junior engineers, and contribute to a dynamic ...
Mixed Signal Logic Design Engineer
San Jose, CA · On-site
$122K - $232K/yr
Medical
Retirement
PTO
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed signal ... Ability to collaborate across diverse teams, mentor junior engineers, and contribute to a dynamic ...
Mixed Signal Logic Design Engineer
Folsom, CA · On-site
$122K - $232K/yr
Medical
Retirement
PTO
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed signal ... Ability to collaborate across diverse teams, mentor junior engineers, and contribute to a dynamic ...
Mixed Signal Logic Design Engineer
Folsom, CA · On-site
$122K - $232K/yr
Medical
Retirement
PTO
Develops the logic design, register transfer level (RTL) coding, and simulation for mixed signal ... Ability to collaborate across diverse teams, mentor junior engineers, and contribute to a dynamic ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
As a Senior Logic Design Engineer, you will be responsible for: * Developing micro-architecture specification of the logic circuit from reading and comprehending the Product Requirement Document (PRD)
Quick apply
As a Senior Logic Design Engineer, you will be responsible for: * Developing micro-architecture specification of the logic circuit from reading and comprehending the Product Requirement Document (PRD)
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Programmable Logic Design Engineer - Temporary
$193K - $290K/yr
The individual will be responsible for the full design phase starting from the requirements' phase ... Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field * 5-8 years ...
Programmable Logic Design Engineer - Temporary
$193K - $290K/yr
The individual will be responsible for the full design phase starting from the requirements' phase ... Bachelor's Degree in Electrical Engineering, Computer Engineering or a related field * 5-8 years ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
Cupertino, CA · On-site
$167K - $172K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
3D Stacked DRAM-on-Logic Design Engineer
San Jose, CA · On-site
$150K - $320K/yr
Medical
Retirement
PTO
Job Title: 3D Stacked DRAM-on-Logic Design Engineer Office Location: San Jose, CA Job Type: Full-Time Work Model: Onsite About SK hynix America At SK hynix America, we're at the forefront of ...
3D Stacked DRAM-on-Logic Design Engineer
San Jose, CA · On-site
$150K - $320K/yr
Medical
Retirement
PTO
Job Title: 3D Stacked DRAM-on-Logic Design Engineer Office Location: San Jose, CA Job Type: Full-Time Work Model: Onsite About SK hynix America At SK hynix America, we're at the forefront of ...
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and ...
Quick apply
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and ...
SoC Design Engineer
Santa Clara, CA · On-site
$156K - $160K/yr
SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor ... Conduct timing control logic design and static timing analysis (STA) for sensor interfaces and ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Physical Design Engineer
San Francisco, CA · On-site
$160K - $164K/yr
... logic design teams, with a critical impact on delivering outstanding PHY designs. You will be ... Description As a Physical Design engineer you will contribute to all phases of physical design of ...
Logic Design Engineer information
See California salary details
$17.79 - $22.77
1% of jobs
$22.77 - $27.76
2% of jobs
$27.76 - $32.74
7% of jobs
$32.74 - $37.72
11% of jobs
$39.16 is the 25th percentile. Wages below this are outliers.
$37.72 - $42.70
14% of jobs
$42.70 - $47.68
15% of jobs
The median wage is $47.88 / hr.
$47.68 - $52.67
14% of jobs
$52.67 - $57.65
8% of jobs
$59.12 is the 75th percentile. Wages above this are outliers.
$57.65 - $62.63
12% of jobs
$62.63 - $67.61
12% of jobs
$67.61 - $72.59
5% of jobs
$17
$50
$72
How much do logic design engineer jobs pay per hour?
As of Aug 15, 2026, the average hourly pay for logic design engineer in California is $50.03, according to ZipRecruiter salary data. Most workers in this role earn between $38.65 and $60.96 per hour, depending on experience, location, and employer.
What is the difference between Logic Design Engineer vs Digital Design Engineer?
| Aspect | Logic Design Engineer | Digital Design Engineer |
|---|---|---|
| Primary Focus | Designing and developing digital logic circuits and systems | Designing complete digital systems, including hardware and firmware integration |
| Skills & Certifications | Digital logic, HDL (VHDL/Verilog), FPGA/ASIC design | Digital logic, HDL, FPGA/ASIC, embedded systems |
| Work Environment | Semiconductor companies, hardware firms, R&D labs | Electronics manufacturers, integrated circuit companies, tech firms |
| Industry Usage | Commonly used in chip design and hardware development | Used in designing complete digital products and systems |
While both roles involve digital logic and HDL skills, a Logic Design Engineer primarily focuses on creating digital logic circuits, whereas a Digital Design Engineer works on designing entire digital systems, often integrating hardware and firmware. The roles overlap but differ in scope and application.
What does a logic design engineer do?
A logic design engineer develops and tests digital circuits and systems, such as processors, memory devices, and integrated circuits. They use hardware description languages like VHDL or Verilog and work with simulation tools to ensure designs meet specifications and performance standards.
What is a logic design engineer?
A Logic Design Engineer is a professional who designs and develops digital circuits and systems, focusing on the logical function and behavior of hardware components. Their main responsibility is to translate high-level requirements into detailed logic circuits using hardware description languages like VHDL or Verilog. Logic Design Engineers work closely with system architects, verification teams, and physical design engineers to ensure that the digital systems meet specifications and function correctly. Their work is crucial in industries such as semiconductor, computing, and consumer electronics, where they help create chips, processors, and other digital devices.
What are the key skills and qualifications needed to thrive as a logic design engineer, and why are they important?
To thrive as a Logic Design Engineer, you need a solid background in digital design, computer architecture, and proficiency in hardware description languages such as VHDL or Verilog, usually supported by a degree in electrical or computer engineering. Experience with simulation tools, synthesis tools, and FPGA or ASIC design flows, as well as familiarity with industry-standard EDA software, is essential. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help set outstanding engineers apart. These competencies ensure the accurate and efficient development of complex digital systems, meeting project requirements and industry standards.
How does a logic design engineer typically collaborate with software and hardware teams during a project?
Logic Design Engineers frequently work closely with both software and hardware teams throughout the product development cycle. They often interface with hardware engineers to ensure that the logic designs are compatible with physical constraints and meet performance requirements. Additionally, they collaborate with software engineers to verify that the designed logic meets system-level functionality and integrates smoothly with firmware or embedded software. Effective communication and iterative feedback are key, as specifications and requirements may evolve during the project.
What are popular job titles related to Logic Design Engineer jobs in California?
For Logic Design Engineer jobs in California, the most frequently searched job titles are:
- Evening Magnetic Design Engineer
- Mechanical Engineer Designer
- Sound Engineer Volunteer
- Junior Mechanical Design Engineer
- Weekday Design Engineer Solidworks
- Design Engineer
- Composite Stress Engineer Remote
- Entry Level Hydro Mechanical Engineer
- Entry Level Analog Ic Design Engineer
- Mechanical Engineer Environmental
What job categories do people searching Logic Design Engineer jobs in California look for?
The top searched job categories for Logic Design Engineer jobs in California are:
- Director Mechanical Engineer Firearms Design
- Trainee Pump Design Engineer
- Evening Mechanical Engineering Visa Sponsorship
- Suspension Design Engineer
- Entry Level Asic Rtl Design Engineer
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- Design And Analysis Engineer
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What cities in California are hiring for Logic Design Engineer jobs?
Cities in California with the most Logic Design Engineer job openings:
Full-time
Re-posted 29 days ago
Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
7th of 244 rated software companies
Job description
We are now looking for a Senior Logic Design Engineer!
As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence! We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you'll be doing:
As a member of our core CPU team, you'll own and be responsible for crafting and timely delivery of a specific unit on the chip.
Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation.
Collaborate with our verification team to verify the correctness of your unit.
Work with implementation to achieve your timing, area, performance and power goals.
Assist with timing closure of super units.
What we need to see:
Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent experience.
5+ years of experience in processor or other related high performance semiconductor designs.
Verilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Strong communication and interpersonal skills are required along with the work in a dynamic, global team. Your successful track record of mentoring junior engineers and interns a huge plus.
A strong background in computer architecture, cache coherency or high speed interconnects is helpful
NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most brilliant and hardworking people in the world working for us. Are you creative and autonomous and love the challenge of crafting the fastest and most power efficient chips in their class? If so, we want to hear from you.
#LI-Hybrid
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993