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Locum Asic Rtl Design Engineer Jobs in Virginia (NOW HIRING)

Curtiss-Wright Corporation

Principal FPGA Engineer

Ashburn, VA · On-site

$144.10 - $192.10/hr

  • Medical

  • Retirement

  • PTO

JR12444**Principal FPGA Engineer - Onsite position**Curtiss-Wright is seeking an experienced ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtiss-Wright

Principal FPGA Engineer

Ashburn, VA

$144K - $192K/yr

  • Medical

  • Retirement

  • PTO

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtisswright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

  • Medical

  • Retirement

  • PTO

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtiss-Wright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

  • Medical

  • Retirement

  • PTO

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtiss-Wright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

  • Medical

  • Retirement

  • PTO

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Curtiss-Wright

Principal FPGA Engineer

Ashburn, VA · On-site

$144K - $192K/yr

  • Medical

  • Retirement

  • PTO

Principal FPGA Engineer - Onsite position Curtiss-Wright is seeking an experienced Principal FPGA ... Strong understanding of FPGA design flow, including RTL design (System Verilog, Verilog, or VHDL ...

Sparton Corporation

FPGA Developer

Fairfax, VA · On-site

$94K - $156K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

... of RTL design for FPGAs in VHDL or Verilog, or System Verilog - knowledge of all 3 strongly ... C++ programming * Mapping data processing algorithms to FPGAs using Vitis HLS * Implementing AI/ML ...

Booz Allen Hamilton, Inc.

Embedded FPGA Engineer

Mclean, VA · On-site +1

  • Medical

  • Life

  • Retirement

  • PTO

Design and implement FPGA-based DSP systems using, HDL, Vitis HLS and modern FPGA toolchains ... Experience with porting and adapting vendor RF transceiver reference designs, such as RTL, IP cores ...

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All JobsLocum Asic Rtl Design Engineer JobsLocum Asic Rtl Design Engineer Jobs in Virginia

Locum Asic Rtl Design Engineer information

What is the difference between Locum Asic Rtl Design Engineer vs Contract Asic Rtl Design Engineer?

AspectLocum Asic Rtl Design EngineerContract Asic Rtl Design Engineer
CredentialsTypically requires relevant engineering degrees and RTL design experienceSimilar credentials, often with specific RTL design certifications
Work EnvironmentTemporary, short-term assignments often in multiple locationsProject-based roles, usually in a fixed location or remote
Employer UsageUsed by agencies or companies needing immediate, short-term expertiseEngaged by companies or staffing agencies for project-specific work

Both roles involve RTL design skills for ASIC development, but a Locum Asic Rtl Design Engineer typically fills short-term, temporary positions, often through staffing agencies, while a Contract Asic Rtl Design Engineer is engaged for specific projects with defined durations. The main difference lies in the nature and duration of employment, but both require similar technical credentials and work environments.

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The most popular types of Asic Rtl Design Engineer jobs in Virginia are:

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Locum Asic Rtl Design Engineer jobs near you

Senior Principal FPGA, Digital Signals Processing Engineer

Jobtailor

Alexandria, VA • On-site

$140 - $190/hr

Other

Posted yesterday

New

Job description

  • Lead the FPGA firmware architecture for Dragonfly, defining signal-processing partitioning across FPGA, GPU, and CPU to meet latency, throughput, and SWaP requirements
  • Migrate GPU-based DSP algorithms into efficient FPGA implementations, including floating-to-fixed-point conversion, quantization analysis, word-length optimization, and bit-accurate verification
  • Design reusable, portable FPGA IP for AMD/Xilinx RFSoC, Versal, UltraScale+, and Zynq platforms
  • Develop real-time FPGA implementations for RF signal processing, including digital down conversion, filtering, FFTs, channelization, synchronization, demodulation, and protocol exploitation
  • Implement and optimize wireless protocol processing for Wi-Fi, Bluetooth/BLE, LoRa, LTE, and 5G NR
  • Develop FPGA capabilities for direction finding, beamforming, geolocation, and multichannel phase-coherent signal processing
  • Establish FPGA verification methodologies, including simulation, automated regression testing, timing closure, hardware validation, and over-the-air testing
  • Support hardware bring-up, integration, production validation, and field testing of Dragonfly systems
  • Serve as technical authority for FPGA firmware and DSP architecture; conduct design reviews, mentor engineers, and establish engineering best practices
  • Contribute to product roadmaps, customer engagements, technical proposals, IRAD efforts, and emerging EW/SIGINT capability development
Requirements
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
  • 10+ years of FPGA development experience supporting RF, SDR, SIGINT, radar, wireless communications, or Electronic Warfare systems
  • Demonstrated ownership of FPGA architecture from concept through deployed production systems
  • Active Secret clearance required
  • Ability to obtain or maintain TS/SCI preferred
  • Expert proficiency with VHDL and/or SystemVerilog, RTL design, pipelining, finite state machines, clock domain crossing, and timing closure
  • Extensive experience with AMD/Xilinx development tools including Vivado, Vitis, Vitis HLS, and RFSoC or Versal platforms
  • Strong background in DSP, including FFTs, digital down/up conversion, FIR/IIR/CIC filters, multirate processing, fixed-point design, CORDIC, and AGC
  • Experience with high-speed interfaces including AXI, PCIe, Ethernet, DDR memory, Aurora, and JESD204B/C
  • Proficiency with MATLAB and/or Python for algorithm development and hardware verification, plus C/C++ development in Linux environments
  • Experience with FPGA simulation, debugging, board bring-up, and RF laboratory validation using industry-standard tools
  • Familiarity with Git, Agile development methodologies, and cross-functional hardware/software engineering teams
  • Experience developing CUDA or GPU-based DSP algorithms and migrating them to FPGA implementations preferred as an additional qualification
  • Experience with beamforming, direction finding, geolocation, MUSIC/ESPRIT, TDOA, or FDOA algorithms preferred as an additional qualification
  • Knowledge of LTE, 5G NR, Wi-Fi, Bluetooth/BLE, LoRa, or other modern communications waveforms preferred as an additional qualification
  • Experience with HLS, Simulink, MATLAB HDL Coder, or Model Composer preferred as an additional qualification
  • Familiarity with RFNoC, GNU Radio, OpenCPI, SOSA, or CMOSS architectures preferred as an additional qualification
Core Competencies

Demonstrates expertise in FPGA firmware architecture and DSP, with a strong focus on real-time implementations for RF signal processing and wireless protocols. Proficient in VHDL, SystemVerilog, and AMD/Xilinx development tools, with a proven track record in leading projects from concept to production.

Highest-signal resume keywords
  • FPGA Firmware Architecture
  • VHDL/SystemVerilog Proficiency
  • DSP Algorithm Development
  • AMD/Xilinx Development Tools
  • Active Secret Clearance
ATS Optimization Keywords Hard Skills
  • FPGA Development
  • Signal Processing
  • Real-Time Implementations
  • Digital Down Conversion
  • FFT
  • Wireless Protocol Processing
  • FPGA Verification Methodologies
  • Pipelining
  • Timing Closure
  • Fixed-Point Design
Soft Skills
  • Mentoring
  • Technical Authority
  • Collaboration
Certifications & Qualifications
  • Bachelor's Degree in Electrical Engineering
  • Active Secret Clearance
  • TS/SCI Clearance Preferred
Industry Keywords
  • RF
  • SDR
  • SIGINT
  • Electronic Warfare
  • 5G NR
  • Wi-Fi
  • Bluetooth/BLE
  • LoRa
  • LTE
  • High-Speed Interfaces
Tools & Technologies
  • Vivado
  • Vitis
  • MATLAB
  • Python
  • C/C++
  • Git
  • Agile Development
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