We are seeking an experienced, self-motivated, and passionate engineer to lead, architect, and ... RTL Design and Implementation: Use Verilog and SystemVerilog to design digital blocks, subsystems ...
We are seeking an experienced, self-motivated, and passionate engineer to lead, architect, and ... RTL Design and Implementation: Use Verilog and SystemVerilog to design digital blocks, subsystems ...
If you are an engineer who enjoys equally RTL and low-level C, this team will give you the ... Familiarity with RTL design using Verilog or SystemVerilog * Understanding of digital logic design ...
If you are an engineer who enjoys equally RTL and low-level C, this team will give you the ... Familiarity with RTL design using Verilog or SystemVerilog * Understanding of digital logic design ...
If you are an engineer who enjoys equally RTL and low-level C, this team will give you the ... Familiarity with RTL design using Verilog or SystemVerilog * Understanding of digital logic design ...
If you are an engineer who enjoys equally RTL and low-level C, this team will give you the ... Familiarity with RTL design using Verilog or SystemVerilog * Understanding of digital logic design ...
Staff AI/ML Digital Design Engineer Locations: Chandler, AZ; Spain; France About Analog Devices ... Lead RTL digital design for complex blocks and subsystems with AI/MLassisted methodologies * Apply ...
Staff AI/ML Digital Design Engineer Locations: Chandler, AZ; Spain; France About Analog Devices ... Lead RTL digital design for complex blocks and subsystems with AI/MLassisted methodologies * Apply ...
Staff Engineer, Digital Design Engineering
Chandler, AZ · On-site
$133K/yr
Lead RTL digital design for complex blocks and subsystems with AI/ML-assisted methodologies * Apply AI/ML techniques to enhance digital design workflows such as synthesis, timing closure, and ...
Staff Engineer, Digital Design Engineering
Chandler, AZ · On-site
$133K/yr
Lead RTL digital design for complex blocks and subsystems with AI/ML-assisted methodologies * Apply AI/ML techniques to enhance digital design workflows such as synthesis, timing closure, and ...
Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint ... Master's degree in computer engineering, electrical engineering, or related field. * Knowledge of ...
Proficient in RTL design (Verilog/System Verilog), Low-power design, synthesis, timing constraint ... Master's degree in computer engineering, electrical engineering, or related field. * Knowledge of ...
Mechanical Design Engineer
Chandler, AZ · On-site
$100K - $130K/yr
Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...
Mechanical Design Engineer
Chandler, AZ · On-site
$100K - $130K/yr
Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...
Mechanical Design Engineer
Chandler, AZ · On-site
$100K - $130K/yr
Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...
Quick apply
Mechanical Design Engineer
Chandler, AZ · On-site
$100K - $130K/yr
Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...
Analog/Mixed-Signal Design Engineer
Tempe, AZ · On-site
$193K/yr
Junior Analog/Mixed-Signal Design Engineer What You'll Do As a Junior Analog/Mixed-Signal Design Engineer, you will support the development of high-performance analog and mixed-signal integrated ...
Analog/Mixed-Signal Design Engineer
Tempe, AZ · On-site
$193K/yr
Junior Analog/Mixed-Signal Design Engineer What You'll Do As a Junior Analog/Mixed-Signal Design Engineer, you will support the development of high-performance analog and mixed-signal integrated ...
Analog/Mixed-Signal Design Engineer
Arizona, LA · On-site
$193K/yr
Junior Analog/Mixed-Signal Design Engineer What You'll Do As a Junior Analog/Mixed-Signal Design Engineer, you will support the development of high-performance analog and mixed-signal integrated ...
Analog/Mixed-Signal Design Engineer
Arizona, LA · On-site
$193K/yr
Junior Analog/Mixed-Signal Design Engineer What You'll Do As a Junior Analog/Mixed-Signal Design Engineer, you will support the development of high-performance analog and mixed-signal integrated ...
Career Accelerator Program - Mixed Signal Verification and Digital Design Engineer
Tucson, AZ · On-site
$116K - $142K/yr
Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ... Engineer your future. We empower our employees to truly own their career and development. Come ...
Career Accelerator Program - Mixed Signal Verification and Digital Design Engineer
Tucson, AZ · On-site
$116K - $142K/yr
Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ... Engineer your future. We empower our employees to truly own their career and development. Come ...
Career Accelerator Program - Mixed Signal Verification and Digital Design Engineer
Tucson, AZ · On-site
$116K - $142K/yr
We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing ... Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ...
Career Accelerator Program - Mixed Signal Verification and Digital Design Engineer
Tucson, AZ · On-site
$116K - $142K/yr
We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing ... Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route ...
Provide technical leadership and mentorship to junior engineers within the MCU and Edge AI ... Proficiency with EDA tools for architecture exploration, RTL design, synthesis, and physical ...
Provide technical leadership and mentorship to junior engineers within the MCU and Edge AI ... Proficiency with EDA tools for architecture exploration, RTL design, synthesis, and physical ...
The engineer will manage complex projects from concept through production, mentor junior engineers ... In addition, the Senior Connector Design Engineer will help define product specifications and ...
The engineer will manage complex projects from concept through production, mentor junior engineers ... In addition, the Senior Connector Design Engineer will help define product specifications and ...
Digital IC Design Engineer
Tucson, AZ · On-site
$116K/yr
Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...
Digital IC Design Engineer
Tucson, AZ · On-site
$116K/yr
Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Quick apply
Senior FPGA Design Engineer
Chandler, AZ · On-site
$101K - $136K/yr
Strong digital design engineer with FPGA/ASIC SoC design experience * Strong FPGA Implementation ... Capable of creating RTL simulations to identify and resolve most issues before hardware tests
Provide technical leadership and mentorship to junior engineers within the MCU and Edge AI ... Proficiencywith EDA tools for architecture exploration, RTL design, synthesis, and physical ...
Provide technical leadership and mentorship to junior engineers within the MCU and Edge AI ... Proficiencywith EDA tools for architecture exploration, RTL design, synthesis, and physical ...
Digital IC Design Engineer
Tucson, AZ · On-site
$116K/yr
Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...
Digital IC Design Engineer
Tucson, AZ · On-site
$116K/yr
Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...
Lead Aerospace Design Engineer
Tucson, AZ · On-site
$88K - $116K/yr
The Lead Designer will also mentor junior engineers, lead technical trade studies and risk ... Ability to serve as the technical design lead for major programs, establish design architecture ...
Lead Aerospace Design Engineer
Tucson, AZ · On-site
$88K - $116K/yr
The Lead Designer will also mentor junior engineers, lead technical trade studies and risk ... Ability to serve as the technical design lead for major programs, establish design architecture ...
Lead Aerospace Design Engineer
Tucson, AZ · On-site
$115K - $125K/yr
The Lead Designer will also mentor junior engineers, lead technical trade studies and risk ... Ability to serve as the technical design lead for major programs, establish design architecture ...
Lead Aerospace Design Engineer
Tucson, AZ · On-site
$115K - $125K/yr
The Lead Designer will also mentor junior engineers, lead technical trade studies and risk ... Ability to serve as the technical design lead for major programs, establish design architecture ...
Junior Rtl Design Engineer information
What are the key skills and qualifications needed to thrive as a Junior RTL Design Engineer, and why are they important?
What are Junior RTL Design Engineers?
What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?
| Aspect | Junior Rtl Design Engineer | Digital Design Engineer |
|---|---|---|
| Required Credentials | Bachelor's in Electrical Engineering or related field; some certifications | Bachelor's or higher in Electrical/Electronic Engineering; certifications vary |
| Work Environment | Design teams in semiconductor or electronics companies | Design and development teams in similar industries |
| Employer & Industry Usage | Commonly employed in chip design, FPGA, ASIC development | Used in digital circuit and system design across industries |
Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.
What are some common challenges faced by Junior RTL Design Engineers when transitioning from academic projects to industry roles?
Full-time
Medical, Dental, Vision, Retirement, PTO
Posted 2 days ago
Job description
About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.comand on LinkedIn and X.
Join our Automotive OpenGMSL Team as a Staff Digital Design Engineer! We are seeking an experienced, self-motivated, and passionate engineer to lead, architect, and design cutting-edge products for Automotive SerDes applications.
OpenGMSL (Gigabit Multimedia Serial Link) is the leading highspeed invehicle serial link technology in the automotive industry. It enables safe and secure transport of video and data while significantly reducing the cost, weight, and complexity of vehicle cable harnesses.
Our extensive portfolio of products is in full production, with millions of vehicles worldwide relying on it daily. OpenGMSL offers cost-effective video and data transport and bridging for various applications, including basic information displays and rearview cameras in mass-market vehicles, safety-critical cameras in autonomous vehicles, and high-resolution touch screens in high-end vehicles. Beyond automotive, OpenGMSL solutions are widely used in industrial and medical systems as well as in growing robotics applications.
The position is based in Beaverton, Oregon, or Colorado Springs, Colorado.
Responsibilities:
- Digital Architecture and Design: Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabitspeed serial interfaces and video and data routing solutions.
- Develop NextGeneration Technologies: Architect, develop, and actively contribute to nextgeneration OpenGMSL technologies, including the definition of new architectures and participation in the development of OpenGMSL technical standards for future product generations.
- Specification Ownership: Write detailed block and subsystem-level specifications for design and implementation.
- RTL Design and Implementation: Use Verilog and SystemVerilog to design digital blocks, subsystems, and toplevel designs.
- Verification and Coverage Closure: Develop blocklevel testbenches, verify block functionality, and collaborate with verification teams to achieve fullchip verification and coverage closure.
- Digital Backend: Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis constraints and timing closure.
- MixedSignal Integration: Communicate closely with mixed-signal designers and verification engineers to support mixedsignal simulations and realnumber modeling across the analog/digital boundary.
- Documentation and Design Reviews: Prepare technical documentation and lead architecture, design, and peer reviews.
- Lab Evaluation and Debug: Support silicon bringup, characterization, and debug activities.
- CrossFunctional Collaboration: Collaborate across analog, digital, verification, test, and product definition teams to define requirements, support production test development, and ensure successful product execution.
- Technical Leadership:Provide technical leadership for complex SerDes subsystems and products.
Minimum Qualifications:
- MSEE or Equivalent: Master's degree in Electrical Engineering or equivalent with 5+ years of relevant experience or PhD with 3+ years of relevant experience.
- Digital Design: Experience designing and verifying complex digital systems using Verilog/SystemVerilog.
- System Architecture & Implementation: Demonstrated ability to architect and plan designs at the system level, translating high-level product concepts into robust design implementations.
- Communication Skills: Clear and concise written and verbal communication skills, with team working experience and a proactive approach to problem-solving.
- SerDes & Communications Expertise: Understanding of communication theory, high-speed SerDes transceiver architectures, and video/data transport.
- Design Trade-Offs & Physical Implementation: Solid understanding of digital and analog design trade-offs, with experience in timing analysis, power estimation, physical design, and DFT concepts.
- Lab & Silicon Debug Experience: Hands-on experience with silicon bring-up and debug
Preferred Qualifications:
- SerDes Standards and Protocols: Expertise in high-speed SerDes standards and protocols, including Ethernet, USB, PCIe, and/or video (DisplayPort, CSI/DSI, HDMI)
- Technical Standards Experience: Experience authoring SerDes technical standards and/or participating in industry standards committees.
- Behavioral Modeling:Experience with behavioral modeling, including verification of mixed-signal systems with behavioral modeling.
- Team Leadership:Experience leading teams and/or projects.
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
EEO is the Law: Notice of Applicant Rights Under the Law.
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $134,644 to $201,966.Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.
This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.
This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.