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Junior Rtl Design Engineer Jobs in Arizona (NOW HIRING)

Mechanical Design Engineer

Chandler, AZ · On-site

$100K - $130K/yr

Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...

Mechanical Design Engineer

Chandler, AZ · On-site

$100K - $130K/yr

Mechanical Design Engineer (Automation/Critical Design/SolidWorks) Are you a hands-on Mechanical ... Mentor junior designers and provide technical guidance Requirements * 10+ years of mechanical ...

Analog/Mixed-Signal Design Engineer

Tempe, AZ · On-site

$193K/yr

Junior Analog/Mixed-Signal Design Engineer What You'll Do As a Junior Analog/Mixed-Signal Design Engineer, you will support the development of high-performance analog and mixed-signal integrated ...

Digital IC Design Engineer

Tucson, AZ · On-site

$116K/yr

Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...

Digital IC Design Engineer

Tucson, AZ · On-site

$116K/yr

Your responsibilities will include RTL coding, simulation, synthesis, timing closure, verification ... As a design engineer, you will prepare test methods and specifications, assist in preparation of ...

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Junior Rtl Design Engineer information

What are the key skills and qualifications needed to thrive as a Junior RTL Design Engineer, and why are they important?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are Junior RTL Design Engineers?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are some common challenges faced by Junior RTL Design Engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.
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Staff Engineer, Digital Design Engineering

Analogdevices

Chandler, AZ

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 2 days ago


Job description

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.comand on LinkedIn and X.

Join our Automotive OpenGMSL Team as a Staff Digital Design Engineer! We are seeking an experienced, self-motivated, and passionate engineer to lead, architect, and design cutting-edge products for Automotive SerDes applications.

OpenGMSL (Gigabit Multimedia Serial Link) is the leading highspeed invehicle serial link technology in the automotive industry. It enables safe and secure transport of video and data while significantly reducing the cost, weight, and complexity of vehicle cable harnesses.

Our extensive portfolio of products is in full production, with millions of vehicles worldwide relying on it daily. OpenGMSL offers cost-effective video and data transport and bridging for various applications, including basic information displays and rearview cameras in mass-market vehicles, safety-critical cameras in autonomous vehicles, and high-resolution touch screens in high-end vehicles. Beyond automotive, OpenGMSL solutions are widely used in industrial and medical systems as well as in growing robotics applications.

The position is based in Beaverton, Oregon, or Colorado Springs, Colorado.

Responsibilities:

  • Digital Architecture and Design: Architect and design digital blocks and subsystems of complex high-speed SerDes ICs, including Gigabitspeed serial interfaces and video and data routing solutions.
  • Develop NextGeneration Technologies: Architect, develop, and actively contribute to nextgeneration OpenGMSL technologies, including the definition of new architectures and participation in the development of OpenGMSL technical standards for future product generations.
  • Specification Ownership: Write detailed block and subsystem-level specifications for design and implementation.
  • RTL Design and Implementation: Use Verilog and SystemVerilog to design digital blocks, subsystems, and toplevel designs.
  • Verification and Coverage Closure: Develop blocklevel testbenches, verify block functionality, and collaborate with verification teams to achieve fullchip verification and coverage closure.
  • Digital Backend: Perform block and toplevel linting, CDC analysis, and power analysis. Assist with synthesis constraints and timing closure.
  • MixedSignal Integration: Communicate closely with mixed-signal designers and verification engineers to support mixedsignal simulations and realnumber modeling across the analog/digital boundary.
  • Documentation and Design Reviews: Prepare technical documentation and lead architecture, design, and peer reviews.
  • Lab Evaluation and Debug: Support silicon bringup, characterization, and debug activities.
  • CrossFunctional Collaboration: Collaborate across analog, digital, verification, test, and product definition teams to define requirements, support production test development, and ensure successful product execution.
  • Technical Leadership:Provide technical leadership for complex SerDes subsystems and products.

Minimum Qualifications:

  • MSEE or Equivalent: Master's degree in Electrical Engineering or equivalent with 5+ years of relevant experience or PhD with 3+ years of relevant experience.
  • Digital Design: Experience designing and verifying complex digital systems using Verilog/SystemVerilog.
  • System Architecture & Implementation: Demonstrated ability to architect and plan designs at the system level, translating high-level product concepts into robust design implementations.
  • Communication Skills: Clear and concise written and verbal communication skills, with team working experience and a proactive approach to problem-solving.
  • SerDes & Communications Expertise: Understanding of communication theory, high-speed SerDes transceiver architectures, and video/data transport.
  • Design Trade-Offs & Physical Implementation: Solid understanding of digital and analog design trade-offs, with experience in timing analysis, power estimation, physical design, and DFT concepts.
  • Lab & Silicon Debug Experience: Hands-on experience with silicon bring-up and debug

Preferred Qualifications:

  • SerDes Standards and Protocols: Expertise in high-speed SerDes standards and protocols, including Ethernet, USB, PCIe, and/or video (DisplayPort, CSI/DSI, HDMI)
  • Technical Standards Experience: Experience authoring SerDes technical standards and/or participating in industry standards committees.
  • Behavioral Modeling:Experience with behavioral modeling, including verification of mixed-signal systems with behavioral modeling.
  • Team Leadership:Experience leading teams and/or projects.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

EEO is the Law: Notice of Applicant Rights Under the Law.

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/DaysThe expected wage range for a new hire into this position is $134,644 to $201,966.
  • Actual wage offered may vary depending on work location, experience, education, training, external market data, internal pay equity, or other bona fide factors.

  • This position qualifies for a discretionary performance-based bonus which is based on personal and company factors.

  • This position includes medical, vision and dental coverage, 401k, paid vacation, holidays, and sick time, and other benefits.