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Internship Remote Design Verification Engineer Jobs

Meta

ASIC Engineer, Design Verification

Sunnyvale, CA · On-site +1

$178K/yr

ASIC Engineer, Design Verification Responsibilities: * Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification * Develop ...

K2 Space

Principal ASIC Design Verification Engineer

OR · On-site +1

$190K - $285K/yr

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

IC Enable

RTL Design/AMS Verification Engineer

Richardson, TX · On-site +1

$122K - $149K/yr

We are seeking an experienced RTL Design / AMS Verification Engineer to support digital and mixed ... Remote Key Responsibilities * Develop, integrate, and verify Verilog RTL for digital and mixed ...

K2 Space

Senior ASIC Design Verification Engineer

OR · On-site +1

$170K - $250K/yr

The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

K2 Space

Principal ASIC Design Verification Engineer

$190K - $285K/yr

The Role We are seeking a Principal ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define ...

K2 Space

Senior ASIC Design Verification Engineer

$170K - $250K/yr

The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the ...

Redolent, Inc.

US_West | Infrastructure Engineer_L3

$169K/yr

Marie.samayoa@capgemini.com SOC Design Verification Engineer Location: Redmond, WA Hybrid (Remote option allowed) Minimum Qualifications • Track record of 'first-pass success' in ASIC development ...

IC Enable

AMS Verification Engineer

Richardson, TX · On-site +1

$122K/yr

Richardson, TX (Hybrid Schedule, Remote considered based on experience and qualifications) What You ... Support design reviews, silicon readiness, bring-up planning, and product delivery What We're ...

Inherent Technologies

Design Verification

Chandler, AZ · Remote

$139K - $169K/yr

Experience with flow optimizations such as Grey/Black-boxing techniques Good at communicating requirements/issues with Implementation, PnR and Design teams. Working knowledge of Confluence ...

Nvidia

Senior ASIC Verification Engineer

OR · On-site +1

The complexity of the clocks and resets design has increased many folds. This requires ... Hands on experience in object-oriented programming * Prior design or verification experience at the ...

Nvidia

Senior ASIC Verification Engineer

OR · On-site +1

The complexity of the clocks and resets design has increased many folds. This requires ... verification process Hands on experience in object-oriented programming Prior design or ...

Apex Informatics

RTL Design and Verification

$139K - $169K/yr

Bachelor's degree in electrical engineering with 3+ experience or master's degree in electrical ... Micro-architecture definition of design features, test plan creation and functional verification.

Mannix Marketing

Web Design Intern

Web Design Internship Remote If you're studying design and want to see how it actually works inside ... The Mannix Marketing design intern will work directly with our Sr. Web Developer & Design Lead and ...

Impinj

Senior Staff RTL Verification Engineer

$158K - $238K/yr

Within the RIC Design group, the digital team owns the digital subsystems of these products ... Support for remote work or a desk with a view. Weekly Q&A sessions with our executive team. Impinj ...

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Internship Remote Design Verification Engineer information

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How much do internship remote design verification engineer jobs pay per hour?

As of Sep 12, 2026, the average hourly pay for internship remote design verification engineer in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What does an internship remote design verification engineer do?

An Internship Remote Design Verification Engineer assists in verifying and validating the functionality of hardware designs, typically for integrated circuits or systems on chip (SoC). Working remotely, they collaborate with engineering teams to develop test plans, create simulation environments, and run verification tests to ensure designs meet required specifications. Interns in this role learn industry-standard verification methodologies such as UVM and tools like SystemVerilog, and contribute to debugging and documenting design issues. The role provides practical experience in hardware design, verification processes, and remote teamwork within the semiconductor industry.

What are the key skills and qualifications needed to thrive as an internship remote design verification engineer, and why are they important?

To succeed as an Internship Remote Design Verification Engineer, you need a solid understanding of digital design concepts, logic circuits, and proficiency in hardware description languages like Verilog or VHDL, often gained through coursework or related internships. Familiarity with simulation tools (such as ModelSim or Synopsys VCS) and version control systems is typically required, and knowledge of scripting languages like Python or TCL is a plus. Strong analytical thinking, effective communication, and attention to detail are crucial soft skills for collaborating with remote teams and identifying design issues. These skills enable accurate verification, efficient teamwork, and the delivery of reliable hardware solutions in a distributed work environment.

What are some common challenges faced by remote design verification engineering interns, and how can they overcome them?

Remote design verification engineering interns often face challenges such as limited face-to-face mentorship, time zone differences, and communication barriers with team members. To overcome these, it's important to proactively schedule regular check-ins with mentors, make use of collaborative tools (like Slack or Zoom), and document questions or issues clearly before reaching out for help. Staying organized and setting clear daily or weekly goals can also help interns stay on track and maximize their learning experience in a remote environment.

What is the difference between Internship Remote Design Verification Engineer vs Internship Remote Test Engineer?

AspectInternship Remote Design Verification EngineerInternship Remote Test Engineer
Primary FocusVerifying hardware or chip designs against specificationsTesting software or hardware products for functionality and performance
Required SkillsHardware design, verification methodologies, scriptingTesting procedures, scripting, debugging
Work EnvironmentDesign labs, remote collaboration with design teamsTesting labs, remote testing environments
Common Industry UsageSemiconductor, electronics companiesSoftware, electronics, consumer electronics companies

While both roles involve testing and verification, the Design Verification Engineer focuses on ensuring hardware or chip designs meet specifications, whereas the Test Engineer emphasizes testing products for functionality. Internships in both areas provide valuable experience in verification and testing processes within the tech industry.

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Internship Remote Design Verification Engineer jobs near you
Infographic showing various Internship Remote Design Verification Engineer job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 87% Full Time, 9% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.

ASIC Engineer, Design Verification

Sunnyvale, CA • On-site, Remote

Meta
Internet and IT • 10K+ employees
Learn more about Metaexternal

$178K/yr

Full-time

Re-posted 13 days ago

Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

Job description

Meta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to drive verification strategy and execution for custom silicon powering Meta's data center infrastructure. In this role, you will lead the end-to-end verification of complex IP blocks and SoCs designed for AI/ML acceleration, networking, and video processing workloads. You will architect scalable UVM-based verification environments, define coverage models, and partner with design, emulation, and post-silicon validation teams to achieve first-pass silicon success across Meta's infrastructure ASIC portfolio.
ASIC Engineer, Design Verification Responsibilities:
  • Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
  • Develop functional tests based on verification test plan
  • Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
  • Debug, root-cause and resolve functional failures in the design, partnering with the Design team
  • Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
  • Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry

Minimum Qualifications:
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 8+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification
  • 8+ years experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
  • Experience in one or more of the following areas along with functional verification-SV Assertions, Formal, Emulation
  • Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
  • Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle

Preferred Qualifications:
  • Experience with compute and/or memory subsystem and/or collective functional and performance verification
  • Experience with verification of ARM/RISC-V/GPU based sub-systems or SoCs
  • Experience in development of UVM based verification environments from scratch
  • Prior experience with fullchip or package-level integration projects
  • Experience working across and building relationships with cross-functional design, model and emulation teams
  • Familiarity with host and system-level concepts for functional verification
  • Experience with chiplet based architectures and package-level integration verification

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$178,000/year to $250,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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