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Internship Ic Layout Mask Designer Jobs (NOW HIRING)

Neuralink

Analog IC Layout Engineer

South San Francisco, CA · On-site

$83K - $139K/yr

You will have the opportunity to collaborate closely with chip designers, electrical engineers ... Physical verification of custom IC mask layouts (LVS, DRC, ERC) Required Qualifications: * 2+ years ...

Skyworks

Sr. Principal IC Layout Designer

Greensboro, NC · On-site

$114K - $220K/yr

Sr. Principal IC Layout Designer Posting Start Date: 7/10/26 Job Location(s): Greensboro If you are looking for a challenging and exciting career in the world of technology, then look no further.

Skyworks

Sr. Principal IC Layout Designer

Greensboro, NC

$114K - $220K/yr

Requisition ID: 77944 Description Skyworks' Greensboro Design Center is seeking a Sr. Principal IC Layout Designer to lead the physical design of analog and RF integrated circuits using commercial ...

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

Expand on your career in Integrated Circuit Layout Design with IC Enable. The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom ...

Analog Devices

Lead Analog IC Layout Engineer

Wilmington, MA · On-site

$134K - $201K/yr

Lead Analog IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization ... As a Lead Designer, Layout, you hold a senior technical position working on our most complex layout ...

Analogdevices

$134K - $201K/yr

Lead Analog IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization ... As a Lead Designer, Layout, you hold a senior technical position working on our most complex layout ...

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How much do internship ic layout mask designer jobs pay per hour?

As of Jul 22, 2026, the average hourly pay for internship ic layout mask designer in the United States is $16.33, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $19.23 per hour, depending on experience, location, and employer.

What does an Internship IC Layout Mask Designer do?

An Internship IC Layout Mask Designer assists in creating detailed layouts for integrated circuit (IC) chips using specialized design software. They work under the supervision of experienced engineers to translate circuit schematics into physical layouts, ensuring that all design rules and manufacturing requirements are met. Interns may also help with design checks, participate in design reviews, and learn about semiconductor manufacturing processes. This role provides hands-on experience in the microelectronics industry, helping interns develop technical and teamwork skills relevant to IC design.

What is the difference between Internship Ic Layout Mask Designer vs IC Design Engineer?

AspectInternship Ic Layout Mask DesignerIC Design Engineer
CredentialsTypically pursuing or recent graduate in Electrical Engineering or related fieldBachelor's or Master's in Electrical Engineering, VLSI Design, or similar
Work EnvironmentDesign labs, CAD software, collaborative teamsDesign teams, simulation tools, project-based
Industry UsageFoundries, semiconductor companies, research labsSemiconductor companies, integrated circuit firms
Search & ComparisonOften compared for entry-level roles and trainingMore advanced, focused on full chip design

The Internship Ic Layout Mask Designer role focuses on creating physical layouts for semiconductor masks, often as an entry-level position. In contrast, an IC Design Engineer handles the entire chip design process, requiring more experience and advanced skills. Both roles are essential in the semiconductor industry but differ mainly in scope and experience level.

What are the key skills and qualifications needed to thrive as an Internship IC Layout Mask Designer, and why are they important?

Success as an Internship IC Layout Mask Designer requires a foundation in electrical engineering or a related field, strong understanding of semiconductor physics, and basic knowledge of IC design principles. Familiarity with EDA tools such as Cadence Virtuoso or Synopsys, as well as an understanding of design rule checking (DRC) and layout versus schematic (LVS) verification, is highly valuable. Attention to detail, problem-solving ability, and effective communication skills help interns collaborate with senior designers and accurately implement complex layouts. These skills and qualities are essential to ensure precise, manufacturable designs that meet performance and reliability standards in the semiconductor industry.

What are some common challenges faced by IC Layout Mask Designer interns, and how can they effectively overcome them?

As an IC Layout Mask Designer intern, you may encounter challenges such as learning specialized EDA (Electronic Design Automation) tools, understanding strict design rules, and interpreting complex circuit schematics. Collaborating closely with senior designers and asking clarifying questions can help you quickly get up to speed. Regularly reviewing layout guidelines, participating in team design reviews, and practicing with real-world design projects will also enhance your skills and confidence. Embracing feedback and staying organized are key to successfully managing the steep learning curve in this technical and detail-oriented role.
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Internship Ic Layout Mask Designer jobs near you
Infographic showing various Internship Ic Layout Mask Designer job openings in the United States as of July 2026, with employment types broken down into 88% Full Time, 7% Part Time, 1% Temporary, and 4% Contract. Highlights an 88% Physical, 6% Hybrid, and 6% Remote job distribution, with an average salary of $33,957 per year, or $16.3 per hour.
IC Layout Manager (Analog/Mixed Signal)

IC Layout Manager (Analog/Mixed Signal)

IC Enable

Richardson, TX • Hybrid

Full-time

Medical, Dental, Vision, Retirement

Posted yesterday

New

Job description

About IC Enable
For over 20 years, IC Enable has delivered high-reliability design IP, IC products, and platform solutions to customers ranging from fast-moving startups to Fortune 50 companies. Our work spans mixed-signal and digital IC design, with deep expertise in full-custom ASIC/SoC development across semiconductor, medical, and defense applications—often in some of the industry’s most demanding process nodes and use cases. We’re growing—and looking for a senior layout / mask design leader who can own critical pieces of complex silicon development and raise the bar for execution across our team.
At IC Enable, we approach every challenge with a startup mindset—nimble, relentless, and unwilling to accept limits. No task is too complex or too ambitious; we take ownership, solve hard problems, and push forward as we continue building something bigger than ourselves.
The Role
As a Mixed-Signal and Analog IC Layout Manager, you will take ownership of chip-level layout execution and verification for high-performance, full-custom ICs. This is a hands-on leadership role: you’ll drive layout quality, guide best practices, and collaborate closely with design, verification, and customer teams to deliver first-pass success on challenging designs.
Location: Richardson, TX (Hybrid: 3 days onsite)
What You’ll Do
  • Lead chip-level layout integration across analog, digital, and IP blocks
  • Own full-chip physical verification: DRC, LVS, EM/IR, parasitic extraction, and density compliance
  • Drive layout quality, consistency, and adherence to foundry requirements
  • Collaborate with cross-functional teams (design, CAD, verification) across global locations
  • Review and interpret layout specifications to ensure accuracy and performance alignment
  • Mentor junior layout engineers and contribute to continuous improvement of layout methodologies
What You Bring
  • 10+ years of hands-on IC layout experience, with significant exposure to mixed-signal designs
  • Proven track record delivering complex, full-custom chips to tape-out
  • Deep expertise with industry-standard tools: Cadence Virtuoso or Synopsys Custom Compiler, and physical verification tools such as Calibre, PVS, or IC Validator
  • Strong experience with LVS, DRC, and chip-level verification flows
  • Solid understanding of semiconductor manufacturing processes and design rules
  • High attention to detail and ability to work effectively under tight timelines
  • Strong communication skills, with experience working directly with internal teams and external customers
  • Must comply with all applicable International Traffic in Arms Regulations (ITAR) requirements (Requires U.S. Persons). Due to the nature of the work and access to export-controlled information, applicants must be authorized to access ITAR-restricted data in accordance with U.S. export control laws and regulations.
Education
  • Bachelor’s degree in Electrical Engineering or equivalent experience (Associate degree with significant industry experience considered)
Why IC Enable
We hire people who are humble, driven, and highly capable—and give them the opportunity to work on technically challenging, meaningful designs. You’ll be part of a team that values ownership, precision, and continuous growth.
Benefits include:
  • Medical, Dental, Vision, and supplemental coverage
  • 401(k) with company match
  • Collaborative, engineering-focused culture
Equal Opportunity Employer
IC Enable is committed to building a diverse and inclusive team.

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About IC Enable

Sourced by ZipRecruiter

Industry

Semiconductor and electronic component manufacturing

Company size

51 - 200 Employees

Headquarters location

Dallas, TX, US

Year founded

2004

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