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Internship Cadence Design Jobs (NOW HIRING)

SkyGig

RFIC Design Intern

San Jose, CA · On-site

This internship is ideal for a student with strong fundamentals in analog/RF circuit design who ... Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or ...

SkyGig

RFIC Design Intern

San Jose, CA · On-site

This internship is ideal for a student with strong fundamentals in analog/RF circuit design who ... Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or ...

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How much do internship cadence design jobs pay per hour?

As of Aug 2, 2026, the average hourly pay for internship cadence design in the United States is $16.33, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $19.23 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Internship Cadence Design, and why are they important?

To excel in a Cadence Design internship, you generally need a background in electrical engineering or computer science, along with a solid understanding of digital or analog circuit design concepts. Familiarity with Cadence EDA tools (such as Virtuoso, Allegro, or OrCAD), scripting languages, and simulation software is highly valuable. Strong analytical thinking, problem-solving skills, and effective teamwork set exceptional interns apart. These skills and qualifications enable interns to contribute meaningfully to design projects and adapt quickly to industry-standard workflows.

What is an Internship at Cadence Design?

An Internship at Cadence Design is a temporary, supervised work experience offered to students or recent graduates interested in the electronic design automation (EDA) industry. Interns at Cadence have the opportunity to work alongside experienced engineers and professionals, contributing to real-world projects in areas such as semiconductor design, software development, and verification. The program is designed to provide hands-on learning, professional development, and exposure to cutting-edge technology, often leading to potential full-time employment opportunities after graduation.

What are some typical projects or tasks that an intern at Cadence Design can expect to work on?

As an intern at Cadence Design, you can expect to engage in hands-on projects that support the development and testing of electronic design automation (EDA) tools. Typical tasks may include collaborating with experienced engineers to write and debug code, assist in the simulation and verification of integrated circuits, and contribute to documentation or user support efforts. You’ll often work within cross-functional teams, gaining exposure to both software and hardware design processes. This experience helps interns build practical skills and establish connections for future career opportunities within the semiconductor industry.
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Internship Cadence Design jobs near you
Infographic showing various Internship Cadence Design job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 3% Part Time, and 2% Contract. Highlights an 82% Physical, 4% Hybrid, and 14% Remote job distribution, with an average salary of $33,957 per year, or $16.3 per hour.

SSG Design Engineering Intern (Fall 2026)

Cadence Design Systems, Inc.

San Jose, CA • On-site

$35 - $62/hr

Full-time

Posted 17 days ago

Cadence Design Systems rating

9.0

Company rating: 9.0 out of 10

Based on 5 frontline employees who took The Breakroom Quiz

33rd of 241 rated software companies

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Design Engineering Intern
The Cadence Silicon Solutions Group (SSG) is seeing rapid adoption of our industry leading Digital IP (intellectual Property), from processor cores and DSPs to Memory Controllers, to Network on Chip (NoC), to IO solutions. Our configurable and extensible IP solutions are designed to meet the demands of SOCs and Chiplets targeted at a wide range of applications. Our customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial, and healthcare.
The Cadence SSG Team is hiring graduates to join our R&D teams in San Jose, CA. This is an amazing opportunity to work as a Design Engineering Intern at a world leader in computational software, semiconductor design IP, and system verification hardware. Come be part of this great SSG Team where you can make an impact that is visible.
This Design Engineering Intern position involves working on Digital Design tasks, or Design Verification tasks related to the Janus NoC IP product.
(a) Digital Design projects involve working on aspects of the logic design of the Janus NoC. It can involve RTL implementation of a specified micro-architecture in System Verilog, simulating and debugging RTL logic, running synthesis, place & route and other Electronic Design Automation (EDA) tools to study and achieve timing, area, and power goals.
(b) Design Verification Team projects involve working on aspects of the verification of the Janus NoC. Assist with developing test plans, writing functional tests (UVM) and verification monitors (SVA) UVM/SVA monitors, debugging failures, analyzing coverage information, and scripting Design Verification flows.
The Design Engineering intern will work closely with the Design, Verification, and Physical Design teams.
Position Requirements:
• Currently enrolled in MS/BS program with major in Electrical Engineering, Computer Engineering, or a similar major.
• Deep understanding of Digital Design and/or Design Verification Fundamentals
• Excellent automation skills using Tcl, Perl, shell scripting
• Excellent oral and written communications skills
• Exposure to design automation tools is a plus
• Internship will be based in San Jose location. Ideal candidates should be from local school near office.
The annual salary range for California is $35/hr to $62/hr. You may also be eligible to receive incentive compensation: bonus, equity, and benefits.Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
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