Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... implementation and verification using Verilog/VHDL * 5+ years of experience with FPGAs with ...
Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... implementation and verification using Verilog/VHDL * 5+ years of experience with FPGAs with ...
FPGA Engineer II with Security Clearance
Fort Wayne, IN · On-site
$113K - $156K/yr
Medical
Dental
Vision
Life
Retirement
PTO
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...
FPGA Engineer II with Security Clearance
Fort Wayne, IN · On-site
$113K - $156K/yr
Medical
Dental
Vision
Life
Retirement
PTO
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (System Verilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...
Senior FPGA Design Engineer with Security Clearance
Fort Wayne, IN · On-site
$113K - $156K/yr
Medical
Dental
Vision
Life
Retirement
PTO
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...
Senior FPGA Design Engineer with Security Clearance
Fort Wayne, IN · On-site
$113K - $156K/yr
Medical
Dental
Vision
Life
Retirement
PTO
FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding ... One or more advanced degrees in Electrical Engineering or a related Science, Technology ...
Principal Engineer - FPGA/ASIC Design
West Lafayette, IN · Hybrid
$133K - $163K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Full-time Working location ... In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which ...
Principal Engineer - FPGA/ASIC Design
West Lafayette, IN · Hybrid
$133K - $163K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Full-time Working location ... In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which ...
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
$134K/yr
Medical
Dental
Vision
Life
Retirement
PTO
This FPGA Engineer is responsible for FPGA and hardware designs for electronic warfare, radar, and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
$134K/yr
Medical
Dental
Vision
Life
Retirement
PTO
This FPGA Engineer is responsible for FPGA and hardware designs for electronic warfare, radar, and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Principal Engineer - FPGA/ASIC Design
Indianapolis, IN · Hybrid
$132K - $162K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Full-time Working location ... In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which ...
Principal Engineer - FPGA/ASIC Design
Indianapolis, IN · Hybrid
$132K - $162K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Full-time Working location ... In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which ...
Principal Engineer - FPGA/ASIC Design
Indianapolis, IN · On-site
$132K - $162K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Full-time Working location ... In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which ...
Principal Engineer - FPGA/ASIC Design
Indianapolis, IN · On-site
$132K - $162K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Job Title: Principal Engineer - FPGA/ASIC Design Working Pattern: Full-time Working location ... In this technical role, you will design, verify, integrate, and test FPGA/ASIC solutions, which ...
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
Wayne, IN · On-site
$120K/yr
Medical
Dental
Vision
Life
Retirement
PTO
This FPGA Engineer is responsible for FPGA and hardware designs for electronic warfare, radar, and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
Wayne, IN · On-site
$120K/yr
Medical
Dental
Vision
Life
Retirement
PTO
This FPGA Engineer is responsible for FPGA and hardware designs for electronic warfare, radar, and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, IN · On-site
$150 - $200/hr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5 years' experience developing and executing RTL verification testbenches using VHDL or ...
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, IN · On-site
$150 - $200/hr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5 years' experience developing and executing RTL verification testbenches using VHDL or ...
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
Fort Wayne, IN · On-site
$134K/yr
Medical
Dental
Vision
Life
Retirement
PTO
This FPGA Engineer is responsible for FPGA and hardware designs for electronic warfare, radar, and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Engineer II
Fort Wayne, IN · On-site
$134K/yr
Medical
Dental
Vision
Life
Retirement
PTO
This FPGA Engineer is responsible for FPGA and hardware designs for electronic warfare, radar, and ... FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Eng with Security Clearance
Fort Wayne, IN · On-site
$125K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineering, or Mathematics (STEM) major. * Experience to include one or more of the following: * FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Full Time Raytheon 2026 - Multi-Product Power & Digital FPGA Eng with Security Clearance
Fort Wayne, IN · On-site
$125K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineering, or Mathematics (STEM) major. * Experience to include one or more of the following: * FPGA/ASIC design (VHDL and/or Verilog coding) or FPGA/ASIC verification (SystemVerilog coding)
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Wayne, IN · On-site
$92K - $124K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5+ experience developing and executing RTL verification testbenches using VHDL or ...
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Wayne, IN · On-site
$92K - $124K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5+ experience developing and executing RTL verification testbenches using VHDL or ...
Senior Electrical Engineer - ASIC/FPGA (Onsite)
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... group's ASIC / FPGA design flow. * Contribute to engineering estimates for new program pursuits ... Experience in Testbench development for the verification of RTL blocks using System Verilog.
Senior Electrical Engineer - ASIC/FPGA (Onsite)
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... group's ASIC / FPGA design flow. * Contribute to engineering estimates for new program pursuits ... Experience in Testbench development for the verification of RTL blocks using System Verilog.
Senior Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, IN · On-site
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... group's ASIC / FPGA design flow. * Contribute to engineering estimates for new program pursuits ... Experience in Testbench development for the verification of RTL blocks using System Verilog.
Senior Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, IN · On-site
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... group's ASIC / FPGA design flow. * Contribute to engineering estimates for new program pursuits ... Experience in Testbench development for the verification of RTL blocks using System Verilog.
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5+ experience developing and executing RTL verification testbenches using VHDL or ...
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5+ experience developing and executing RTL verification testbenches using VHDL or ...
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, IN · On-site
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5+ experience developing and executing RTL verification testbenches using VHDL or ...
Sr Principal Electrical Engineer - ASIC/FPGA (Onsite)
Fort Wayne, IN · On-site
$102K - $138K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... Engineer to support the design, development, and integration of advanced digital ASIC and FPGA ... At least 5+ experience developing and executing RTL verification testbenches using VHDL or ...
Senior Electrical Engineer - ASIC/FPGA (Onsite)
Wayne, IN · On-site
$92K - $124K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... group's ASIC / FPGA design flow. * Contribute to engineering estimates for new program pursuits ... Experience in Testbench development for the verification of RTL blocks using System Verilog.
Senior Electrical Engineer - ASIC/FPGA (Onsite)
Wayne, IN · On-site
$92K - $124K/yr
Medical
Dental
Vision
Life
Retirement
PTO
... group's ASIC / FPGA design flow. * Contribute to engineering estimates for new program pursuits ... Experience in Testbench development for the verification of RTL blocks using System Verilog.
Senior/Principal Hardware ASIC Validation Engineer
Odon, IN · On-site
$110K - $147K/yr
Summary: A Senior Analog ASIC Validation Engineer specifies, designs, verifies, tests and validates on the bench, and documents Application-Specific Integrated Circuits. Responsibilities The ...
Senior/Principal Hardware ASIC Validation Engineer
Odon, IN · On-site
$110K - $147K/yr
Summary: A Senior Analog ASIC Validation Engineer specifies, designs, verifies, tests and validates on the bench, and documents Application-Specific Integrated Circuits. Responsibilities The ...
Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... ASIC development and design implementation and verification using Verilog/VHDL * Ability to read ...
Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... ASIC development and design implementation and verification using Verilog/VHDL * Ability to read ...
Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... ASIC development and design implementation and verification using Verilog/VHDL * Ability to read ...
Due to the nature of our research and the necessity to obtain security clearance, the Engineering ... ASIC development and design implementation and verification using Verilog/VHDL * Ability to read ...
Internship Asic Verification Engineer information
What types of projects and responsibilities can an internship ASIC verification engineer expect to work on during their internship?
As an Internship ASIC Verification Engineer, you will typically assist in developing verification environments, writing testbenches, and executing test cases to validate the functionality of ASIC designs. You may work with simulation tools, debug issues alongside experienced engineers, and contribute to documentation and coverage analysis. Interns are often included in team meetings and code reviews, providing hands-on exposure to industry-standard verification methodologies and collaborative workflows. This experience helps build a strong foundation for future roles in hardware design and verification.
What are the key skills and qualifications needed to thrive as an internship ASIC verification engineer, and why are they important?
To thrive as an Internship ASIC Verification Engineer, you need a solid background in digital design fundamentals, hardware description languages (like Verilog or VHDL), and coursework in computer engineering or a related field. Familiarity with simulation tools (such as ModelSim or Synopsys VCS), scripting languages (like Python or Perl), and possibly exposure to UVM methodology are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help interns adapt and contribute quickly. These competencies ensure accurate verification processes, minimize design flaws, and support successful project outcomes in collaborative engineering environments.
What is the difference between Internship Asic Verification Engineer vs Asic Verification Engineer?
| Aspect | Internship Asic Verification Engineer | Asic Verification Engineer |
|---|---|---|
| Qualifications | Enrolled in or recent graduate of relevant engineering programs | Bachelor's or Master's in Electrical Engineering or related field |
| Work Environment | Internship, supervised, part-time or full-time | Full-time professional role in design teams |
| Responsibilities | Assist verification tasks, learn tools and processes | Design, develop, and execute verification plans independently |
| Experience Level | Entry-level, limited industry experience | Mid-level, with practical verification experience |
In summary, an Internship Asic Verification Engineer is a temporary, learning-focused role for students or recent graduates, while an Asic Verification Engineer is a full-time professional responsible for verification tasks within the industry.
What does an internship ASIC verification engineer do?
An Internship ASIC Verification Engineer assists in verifying the functionality and performance of ASIC (Application-Specific Integrated Circuit) designs before they are manufactured. This role typically involves creating and running testbenches, writing verification code (often in SystemVerilog or similar languages), and collaborating with design engineers to identify and resolve issues. Interns learn industry-standard verification methodologies, such as UVM, and gain hands-on experience with simulation tools and debugging processes. The goal is to ensure the ASIC design meets specifications and is free of critical errors before fabrication.
What are the most commonly searched types of Asic Verification Engineer jobs in Indiana? The most popular types of Asic Verification Engineer jobs in Indiana are:
What are popular job titles related to Internship Asic Verification Engineer jobs in Indiana? For Internship Asic Verification Engineer jobs in Indiana, the most frequently searched job titles are:
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Kratos Defense & Security Solutions rating
7.8
Based on 10 frontline employees who took The Breakroom Quiz
Job description
U.S. CITIZENS ONLY! Due to the nature of our research and the necessity to obtain security clearance, the Engineering division of Kratos SRE is only permitted to consider and hire U.S. Citizens for this position. Permanent Residents and Visa-holders are not eligible for employment.
General Summary
This full-time position is in the Systems Development Department of Kratos SRE and is a highly motivated and self-driven role that will focus on leading development efforts for next-generation technologies for microelectronics
Key Responsibilities
- Provide technical leadership in the development and evaluation of custom integrated circuit designs for defense applications,
- Investigate, research, and operationalize state-of-the-art and innovative tools and tool chains to ASIC designs.
- Maintain relationships with fabrication sites for ASICs.
- Champion proposal and whitepaper writing efforts.
- Perform program and project management duties such as task management and reporting.
- Plans and conducts research and development efforts, generally involving the different projects with multiple parts.
- Manage and mentor electrical and computer engineers through knowledge transfer on technical approaches and best practices.
- Oversee data collection exercises and acceptance testing of on-chip technologies.
- Develop use cases and tradeoffs of technologies along with recommendations for product pipelines.
- Manage workflow and version control of block diagrams, schematics, and code.
- Lead design, integration, and testing efforts through both hands-on and delegated approaches.
- Maintain technical knowledge and a presence in the technical communities by attending conferences and interfacing with professional associations.
Minimum Qualifications
- U.S. Citizen with ability to obtain DOD/IC Security Clearance.
- A Master's degree or Ph.D. (or equivalent experience) in electrical engineering, physics, and/or computer science/engineering.
- Experience interfacing with government and non-government customers.
- Experience modeling and simulating analog and digital architectures.
- Strong verbal and written communication skills.
- Experience with electronics testing and instrumentation, including oscilloscopes, multimeters, logic analyzers, function generators, power supplies, and data acquisition.
- 5+ years of ASIC development
- 2+ years of design implementation and verification using Verilog/VHDL
- 5+ years of experience with FPGAs with knowledge of Verilog/VHDL
- 5+ years of experience with testing ASIC designs
- Willing to travel within the Continental United States (CONUS).
Preferred Qualifications
- Knowledgeable in anti-tamper and hardware assurance technologies and techniques.
- Knowledgeable in the fundamentals of device physics
- Experience transitioning hardware from the bench top to fielded systems.
- Experience with radiation effects in microelectronics
- Strong mathematical problem-solving skills
(No Phone Calls Please)
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What Kratos Defense & Security Solutions employees say
Pay
Benefits
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Get the full story on Breakroom
About Kratos Defense
Sourced by ZipRecruiter
Industry
National security and international affairs
Company size
1,001 - 5,000 Employees
Headquarters location
San Diego, CA, US
Year founded
1994