IC Package Engineer
$2.0K/mo
Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...
$2.0K/mo
Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...
$2.0K/mo
Leverage advanced packaging technologies, with expertise in CoWoS (Chip-on-Wafer-on-Substrate) and heterogeneous integration techniques, to design both open and closed packages, incorporating ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
We are seeking a Package Layout Design Engineer to join our hardware team and contribute to the physical design of advanced IC packages for next-generation machine learning and data center ASICs. In ...
Chandler, AZ · On-site
One of our valued Client is looking for the below requirement IC Packaging Design Engineer LOC: Chandler, AZ or Hillsboro, OR Longterm Contract Skills Required Bachelor's or Master's degree in ...
Chandler, AZ · On-site
One of our valued Client is looking for the below requirement IC Packaging Design Engineer LOC: Chandler, AZ or Hillsboro, OR Longterm Contract Skills Required Bachelor's or Master's degree in ...
Wilmington, MA · On-site
$95K - $131K/yr
Perform electrical simulations of IC packages, modules, or systems using commercial simulation tools. * Work closely with cross-functional teams to understand product and packaging requirements ...
Wilmington, MA · On-site
$95K - $131K/yr
Perform electrical simulations of IC packages, modules, or systems using commercial simulation tools. * Work closely with cross-functional teams to understand product and packaging requirements ...
San Francisco, CA · On-site
We are looking for a hardworking, and passionate IC Packaging Engineering Lead to join our team. Description • Work with cross-functional teams and lead package integration and architecture efforts ...
San Francisco, CA · On-site
We are looking for a hardworking, and passionate IC Packaging Engineering Lead to join our team. Description • Work with cross-functional teams and lead package integration and architecture efforts ...
Austin, TX · On-site
We are looking for a hardworking, and passionate IC Packaging Engineering Lead to join our team. Description • Work with cross-functional teams and lead package integration and architecture efforts ...
Austin, TX · On-site
We are looking for a hardworking, and passionate IC Packaging Engineering Lead to join our team. Description • Work with cross-functional teams and lead package integration and architecture efforts ...
$95K - $131K/yr
Perform electrical simulations of IC packages, modules, or systems using commercial simulation tools. * Work closely with cross-functional teams to understand product and packaging requirements ...
$95K - $131K/yr
Perform electrical simulations of IC packages, modules, or systems using commercial simulation tools. * Work closely with cross-functional teams to understand product and packaging requirements ...
$181K - $318K/yr
We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip ...
$181K - $318K/yr
We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip ...
Bozeman, MT · On-site
$106K - $146K/yr
As a Senior Photonics Engineer specializing in Photonic IC Packaging, you are a technical leader responsible for designing, developing, and scaling advanced photonic packaging solutions. You drive ...
Bozeman, MT · On-site
$106K - $146K/yr
As a Senior Photonics Engineer specializing in Photonic IC Packaging, you are a technical leader responsible for designing, developing, and scaling advanced photonic packaging solutions. You drive ...
$181K - $318K/yr
We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip ...
$181K - $318K/yr
We are looking for a hardworking and passionate IC Packaging Assembly Engineer to join our team. In this highly visible role, you will own development, optimization and sustaining the advanced flip ...
San Jose, CA · On-site
$86K - $118K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common and advanced analog IC package platforms and assembly/bumping processes. * Power module and system ...
San Jose, CA · On-site
$86K - $118K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common and advanced analog IC package platforms and assembly/bumping processes. * Power module and system ...
$181K - $318K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
$181K - $318K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
San Jose, CA · On-site
$86K - $118K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common and advanced analog IC package platforms and assembly/bumping processes. * Power module and system ...
San Jose, CA · On-site
$86K - $118K/yr
IC package design: design and optimize IC packages for a wide range of ADI products, using common and advanced analog IC package platforms and assembly/bumping processes. * Power module and system ...
San Jose, CA · On-site
$200K - $260K/yr
... packaging. * Must be eligible to work in the United States and obtain and maintain an Active U.S ... Compensation/Benefits for the IC Package Design Engineer: * Salary Range: $200,000 - $260,000 ...
San Jose, CA · On-site
$200K - $260K/yr
... packaging. * Must be eligible to work in the United States and obtain and maintain an Active U.S ... Compensation/Benefits for the IC Package Design Engineer: * Salary Range: $200,000 - $260,000 ...
San Francisco, CA · On-site
$122K - $164K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
San Francisco, CA · On-site
$122K - $164K/yr
Looking for a senior level IC packaging engineer to develop exciting new products. You will be responsible providing Custom Silicon packaging solutions in a module/system for various consumer markets.
The primary function of this position is program management for development of advanced chiplet-based IC Packages including HDFO (High Density Fan-out) and other advanced IC Package constructions for ...
The primary function of this position is program management for development of advanced chiplet-based IC Packages including HDFO (High Density Fan-out) and other advanced IC Package constructions for ...
$132K - $164K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions that include design, material selections, qualification, and release-to-manufacturing for various ...
$132K - $164K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions that include design, material selections, qualification, and release-to-manufacturing for various ...
San Jose, CA · On-site
$132K - $164K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions that include design, material selections, qualification, and release-to-manufacturing for various ...
San Jose, CA · On-site
$132K - $164K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions that include design, material selections, qualification, and release-to-manufacturing for various ...
$103K - $143K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions that include design, material selections, qualification, and release-to-manufacturing for various ...
$103K - $143K/yr
Work with cross-functional team to develop advanced integrated circuit ("IC") packaging solutions that include design, material selections, qualification, and release-to-manufacturing for various ...
San Jose, CA · On-site
$205K - $255K/yr
Collaborate with IC packaging, optical connector, and silicon photonics teams to achieve co-design optimization * Build and mentor a high-performing team of packaging engineers and scientists.
San Jose, CA · On-site
$205K - $255K/yr
Collaborate with IC packaging, optical connector, and silicon photonics teams to achieve co-design optimization * Build and mentor a high-performing team of packaging engineers and scientists.
$12.50 - $13.83
2% of jobs
$13.83 - $15.17
9% of jobs
$16.23 is the 25th percentile. Wages below this are outliers.
$15.17 - $16.50
17% of jobs
The median wage is $17.55 / hr.
$16.50 - $17.83
27% of jobs
$17.83 - $19.17
15% of jobs
$19.57 is the 75th percentile. Wages above this are outliers.
$19.17 - $20.50
15% of jobs
$20.50 - $21.83
6% of jobs
$21.83 - $23.16
4% of jobs
$23.16 - $24.50
3% of jobs
$24.50 - $25.83
1% of jobs
$25.83 - $27.16
0% of jobs
$12
$18
$27
| Aspect | IC Packaging | IC Design Engineer |
|---|---|---|
| Required Credentials | Typically requires a degree in electrical engineering, materials science, or related fields; certifications in packaging technologies are a plus. | Requires a degree in electrical engineering, computer engineering, or related fields; often includes certifications in digital or analog design. |
| Work Environment | Manufacturing facilities, R&D labs, and cleanrooms focused on physical packaging and assembly. | Design labs, CAD environments, and simulation tools for circuit design and testing. |
| Employer & Industry Usage | Found in semiconductor companies, electronics manufacturers, and R&D centers. | Employed by semiconductor firms, integrated circuit companies, and design houses. |
IC Packaging and IC Design Engineer roles are closely related but focus on different stages of semiconductor development. IC Packaging involves physically enclosing and protecting the chip, requiring expertise in materials and manufacturing processes. IC Design Engineers focus on creating the circuit layouts and functionalities of the chips. Both roles are essential in the semiconductor industry and often collaborate during product development.

$2.0K/mo
Full-time
Medical, Dental, Vision
Posted 4 days ago
About Etched
Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep chain-of-thought reasoning.
IC Package Engineer
We are seeking an experienced IC Package Design Engineer to drive and own all aspects of substrate layout and package design work. The ideal candidate will have extensive experience with advanced packaging technologies such as CoWoS, large-scale BGA designs, and package warpage mitigation strategies. You will play a key role in ensuring the mechanical and electrical integrity of packages that power the next generation of AI hardware.
Representative Projects:
You maybe a good fit if you have
We encourage you to apply even if you do not believe you meet every single qualification.
How we're different:
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
Benefits: