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Ic Package Design Engineer Jobs (NOW HIRING)

Package Design Engineer

Chandler, AZ

$133.90K/yr

Package Design: * Lead Si/package/PCB/system co-design work collaborating with downstream system ... Supporting activities related to production and assembly of IC packages with substrate suppliers ...

Principal SI/PI Design Engineer

New Providence, NJ · On-site

$157.10K - $250.90K/yr

As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...

Package Design: * Lead Si/package/PCB/system co-design work collaborating with downstream system ... Supporting activities related to production and assembly of IC packages with substrate suppliers ...

As an SI/PI Design Engineer, you will be an integral part of the Ciena engineering team and lead ... Familiar with package substrate technologies including 2.5-D IC and 3-D IC interposers * Problem ...

IC Packaging Engineer

San Jose, CA

$159.40K/yr

Perform and guide hands-on package design and physical layout, including critical structures for ... Engineering, or related field. * Minimum of 10+ years of experience with extensive IC packaging ...

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Ic Package Design Engineer information

See salary details

$90K

$136.5K

How much do ic package design engineer jobs pay per year?

As of May 31, 2026, the average yearly pay for ic package design engineer in the United States is $135,040.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $136,000.00 per year, depending on experience, location, and employer.

What is an IC Package Design Engineer job?

An IC Package Design Engineer is responsible for designing and developing semiconductor chip packaging to ensure electrical, thermal, and mechanical performance. They work with cross-functional teams to optimize package layouts, material selection, and manufacturing processes. Their role involves using CAD tools, simulation software, and collaborating with fabrication and assembly teams to meet product requirements.

What are the key skills and qualifications needed to thrive in the Ic Package Design Engineer position, and why are they important?

Success as an IC Package Design Engineer requires a strong background in electrical engineering, semiconductor packaging principles, and CAD software proficiency, typically supported by a relevant engineering degree. Familiarity with electronic design automation (EDA) tools such as Cadence or Mentor Graphics, and knowledge of industry standards like JEDEC, are highly valuable. Excellent problem-solving, attention to detail, and effective communication skills help navigate complex design challenges and collaborate with cross-functional teams. These abilities are crucial for ensuring robust package designs that meet performance, cost, and manufacturability requirements in the fast-paced semiconductor industry.

What are some common daily responsibilities for an IC Package Design Engineer?

IC Package Design Engineers typically spend their days designing and simulating semiconductor package layouts, reviewing schematics, and ensuring designs meet electrical and thermal requirements. They collaborate closely with PCB designers, test engineers, and manufacturing teams to optimize the package for performance and ease of assembly. Daily work also involves troubleshooting design issues, interacting with vendors for material selection, and participating in design reviews alongside multidisciplinary teams. The role balances hands-on technical tasks with communication, making cross-team coordination a key part of the job.
What states have the most Ic Package Design Engineer jobs? States with the most job openings for Ic Package Design Engineer jobs include:
Infographic showing various Ic Package Design Engineer job openings in the United States as of May 2026, with employment types broken down into 91% Full Time, 6% Part Time, and 3% Contract. Highlights an 87% Physical, 2% Hybrid, and 11% Remote job distribution, with an average salary of $135,040 per year, or $64.9 per hour.
Package Design Engineer

Package Design Engineer

Marvell

Chandler, AZ

$133.90K/yr

Full-time

Life, Retirement

Posted 5 days ago


Job description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Advanced Packaging Physical Design for Photonic Fabric BU

What You Can Expect

  • Package Design:
    • Lead Si/package/PCB/system co-design work collaborating with downstream system design teams and upstream ASIC designers to develop a portfolio of packages that meets a huge range of performance design points, while optimizing re-use in other Marvell products.
    • Scope all aspects of package design feasibility at Silicon interposer and substrate level for multi-chip SiP packaging.
    • Support pre/post silicon bring up, yield improvement activities, qualification, failure analysis, and system implementation.
  • Package Layout Expertise:
    • Lead all aspects of package layout based on I/O, SI-PI and form factor requirements, including routing, design for reliability, thermal, mechanical, manufacturability, bumping, substrate, material selection, assembly, and support for testing.
    • Meet specifications for high-speed interfaces such as HBM, DDR, PCIe and 56G/112G SerDes.
  • 2.5D and 3D Package Design Planning and Execution:
    • Plan and execute Silicon interposer and RDL based design layout solutions for advanced packaging architectures.
    • Netlist management for heterogeneous chiplet assemblies using latest EDA solutions.
  • Substrate Manufacturing and OSAT Assembly Engagement:
    • Supporting activities related to production and assembly of IC packages with substrate suppliers and OSATs.
    • Work with cross-functional teams and support package integration and architecture efforts with vendors.
    • Actively participate in qualification of package and board level assembly with sensitivity to physics of failures for high thermo-mechanical reliability, driving appropriate test vehicle definition and design.
    • Drive ideation and innovation of advanced package solutions and specifications with vendors to advance productization efforts by Marvell

What We're Looking For

  • Education:BS/MS/PhD in EE/ECE/MSE/ME/ChemE or related disciplines.
  • Experience:5-10 years of experience in Semiconductor Packaging Design of heterogeneous architectures, including silicon interposer and RDL designs.
  • Technical Expertise:
    • Extensive experience working with advanced packaging design tools such as Cadence APD.
    • Experience working with MCAD tools such as SolidWorks, AutoCAD and interconversion of package design databases to MCAD files.
    • Knowledge and insights to deliver high density/high performance interconnects in various 2.5D/3D packaging technologies including InFO, CoWoS, FoCoS and EMIB.
    • Good understanding of cross-functional packaging areas: Si floor plan, package, board layout and architecture, design rules, BOM, enabling material/process technologies, thermal, mechanical, Signal/Power Integrity, design for manufacturing, assembly, reliability, and cost.
    • Familiarity with photonics packaging is a plus but not necessary.
  • Substrate Vendor and OSAT Engagement:
    • Proven track record of working with substrate vendors to meet design for manufacturing, yield, and reliability.
    • Proven track record of engagement with OSATs to meet assembly requirements and drive new developments to meet new product requirements.
  • Industry Knowledge:Experience in High Speed Signaling best practices, Signal and Power integrity requirements.
  • Soft Skills:Strong analytical, problem-solving, cross-functional collaboration, project management, and technical presentation skills.

Expected Base Pay Range (USD)

166,520 - 249,500, $ per annum

The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life's most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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