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Ic Layout Jobs in California (NOW HIRING)

Cisco

IC Package Layout Team Leader

San Jose, CA · On-site

$210K - $305K/yr

Your Impact As a Package Layout Team Leader, you will lead and grow the San Jose layout team while supporting the execution of complex package programs. You will provide technical guidance ...

Cisco

IC Package Layout Team Leader

San Jose, CA · On-site

$210K - $305K/yr

Your Impact As a Package Layout Team Leader, you will lead and grow the San Jose layout team while supporting the execution of complex package programs. You will provide technical guidance ...

Lightmatter

Package Layout Engineer

Mountain View, CA · Hybrid

Deliver IC package substrate layouts for standard and advanced packaging technologies. * Contribute to the product concept phase by delivering preliminary substrate designs and floorplanning to ...

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How much do ic layout jobs pay per hour?

As of Sep 7, 2026, the average hourly pay for ic layout in California is $21.54, according to ZipRecruiter salary data. Most workers in this role earn between $15.43 and $21.83 per hour, depending on experience, location, and employer.

What is an IC layout?

An IC Layout job involves designing the physical layout of integrated circuits (ICs) to ensure they meet electrical, manufacturing, and performance requirements. Layout engineers use specialized software to place and route transistors, resistors, and metal interconnects while following design rules and constraints. They work closely with circuit designers to optimize the layout for power, performance, and area. The role requires knowledge of semiconductor manufacturing processes and layout verification techniques such as DRC (Design Rule Checking) and LVS (Layout vs. Schematic).

What are the key skills and qualifications needed to thrive in the IC layout position, and why are they important?

To thrive as an IC Layout professional, you need strong proficiency in analog and digital integrated circuit (IC) layout design, a solid understanding of semiconductor physics, and a degree in electrical engineering or a related field. Expertise with Electronic Design Automation (EDA) tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys is typically required. Attention to detail, effective communication, and the ability to collaborate with circuit design engineers are valuable soft skills. These qualities ensure that layouts are precise, manufacturable, and meet stringent performance and reliability standards in the semiconductor industry.

What are some common challenges faced by IC layout engineers, and how do they typically overcome them?

IC Layout engineers often encounter challenges such as balancing area constraints with performance requirements, minimizing parasitic effects, and ensuring adherence to complex design rules. These challenges are addressed by leveraging advanced EDA tools, closely collaborating with circuit designers to understand specific needs, and frequently reviewing and updating the layout to align with fabrication requirements. Strong analytical thinking and attention to detail are essential for identifying and solving these issues. By keeping up with evolving technology and continually honing their skills, IC Layout engineers can efficiently deliver robust and high-quality designs.

What are the most commonly searched types of Ic Layout jobs in California?

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Ic Layout jobs near you
Infographic showing various Ic Layout job openings in California as of August 2026, with employment types broken down into 1% Internship, 82% Full Time, 13% Part Time, 2% Contract, and 2% Nights. Highlights an 92% Physical, 3% Hybrid, and 5% Remote job distribution, with an average salary of $44,808 per year, or $21.5 per hour.

Principal Photonics IC Design Engineer

NVIDIA Gruppe

Santa Clara, CA • On-site

$250/hr

Other

Posted 21 days ago

Nvidia rating

9.6

Company rating: 9.6 out of 10

Based on 18 frontline employees who took The Breakroom Quiz

6th of 247 rated software companies

Job description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice and join us today!

What you will be doing:
  • Own end-to-end PIC product delivery: architecture, design, layout, DRC/LVS verification, tapeout, and post-silicon validation on advanced silicon photonics platforms
  • Lead cross-functional execution across photonic device, analog/mixed-signal, packaging, and systems teams
  • Drive tapeout schedules, define design milestones, and resolve critical path issues across multiple concurrent PIC programs
  • Architect optical transceiver PICs integrating modulators, photodetectors, wavelength multiplexing, waveguides, and optical couplers for high-speed and/or DWDM applications
  • Define and improve PIC design methodology, automation (e.g., scripted DRC, parameterized cells), and verification flows in Cadence and related EDA tools
  • Mentor and technically guide a team of photonics designers; set technical direction for the photonics PIC roadmap
What We Need to See:
  • PhD in Electrical Engineering, Physics, Applied Physics, or a closely related field with emphasis on integrated photonics, silicon photonics, or photonic device physics (or equivalent experience).
  • 8+ years of industry experience in photonics IC design, with demonstrated progression into technical leadership roles
  • Deep hands-on expertise with Cadence design environment (Virtuoso, PCell development, SKILL scripting) for photonic IC layout and simulation
  • Proven track record of production tapeouts — you have personally driven PICs from design through GDS signoff on a foundry silicon photonics process
  • Strong understanding of photonic device physics: waveguides, passive/active components, ring/MZI modulators, photodetectors, optical couplers
  • Demonstrated technical leadership: setting project scope, making architecture tradeoffs, driving cross-team alignment, and delivering on schedule
Ways to Stand Out From the Crowd:
  • Experience with high-speed (>50 Gbaud) optical modulator or receiver PIC design for datacom/telecom applications
  • Experience with DWDM PIC architectures (MUX/DEMUX, multi-channel transceivers, wavelength tuning)
  • Familiarity with co-packaged optics (CPO) system requirements and advance packaging integration
  • Experience with photonic circuit simulation and CAD tools (Ansys Lumerical, ZeMax, Cadence, MATLAB, Python and Verilog-A) and electromagnetic solvers (FDTD, FDE, EME)
  • Track record of publications and/or patents in silicon photonics

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 232,000 USD - 368,000 USD.

You will also be eligible for equity and benefits.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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What Nvidia employees say

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Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

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About Nvidia

Sourced by ZipRecruiter

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

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