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Ic Layout Designer Jobs in California (NOW HIRING)

SpaceX

RFIC Layout Designer (RFIC Engineering)

Irvine, CA · On-site

$120K - $170K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

SpaceX

RFIC Layout Designer (RFIC Engineering)

Irvine, CA · On-site

$120K - $170K/yr

You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and ...

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How much do ic layout designer jobs pay per hour?

As of Aug 21, 2026, the average hourly pay for ic layout designer in California is $40.76, according to ZipRecruiter salary data. Most workers in this role earn between $17.31 and $57.64 per hour, depending on experience, location, and employer.

What is an IC layout designer?

An IC Layout Designer is responsible for creating the physical design of integrated circuits (ICs) based on schematics provided by circuit designers. They use specialized software tools to arrange transistors, resistors, capacitors, and interconnections while ensuring proper functionality, manufacturability, and performance. Their role involves optimizing layouts for power, area, and signal integrity while adhering to design rules and foundry guidelines. IC Layout Designers work closely with circuit designers and verification engineers to meet project specifications and ensure successful chip fabrication.

What does an IC layout designer do?

As an IC Layout Designer, your typical day involves interpreting circuit schematics, translating them into physical layouts using specialized EDA tools, and running verification checks to ensure compliance with design and manufacturing rules. You will collaborate closely with circuit designers and verification engineers to address layout-related challenges and optimize designs for performance, area, and yield. Regular communication and feedback sessions are common, as is updating documentation and maintaining clear records of design changes. These tasks help ensure project timelines are met and high-quality integrated circuits are delivered.

What are the key skills and qualifications needed to thrive as an IC layout designer?

To thrive as an IC Layout Designer, you need a strong background in semiconductor physics, circuit design principles, and experience with industry-standard layout tools such as Cadence Virtuoso or Synopsys Custom Compiler, often supported by a degree in Electrical Engineering or a related field. Familiarity with DRC/LVS verification, PDKs, and EDA tools, as well as knowledge of relevant process nodes, is essential. Attention to detail, effective teamwork, and strong communication skills enable designers to collaborate with circuit engineers and deliver precise layouts under tight deadlines. These competencies ensure the creation of optimized, reliable integrated circuits while meeting stringent performance and manufacturability requirements.

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Ic Layout Designer jobs near you
Infographic showing various Ic Layout Designer job openings in California as of August 2026, with employment types broken down into 85% Full Time, 11% Part Time, 2% Contract, and 2% Nights. Highlights an 93% Physical, 3% Hybrid, and 4% Remote job distribution, with an average salary of $84,781 per year, or $40.8 per hour.

Analog IC Layout Engineer

Neuralink

South San Francisco, CA • On-site

Full-time

Re-posted 24 days ago

Job description

Team Description:

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Job Description and Responsibilities:

We are looking for experienced and hands-on engineers with a creative and initiative mindset, who are interested in exploring the next-generation chip design with advanced architectures and hardware accelerators with a goal of enhancing the energy efficiency, information entropy, and scalability of our wireless brain-computer interfaces towards the physical limit of silicon technology. The ideal candidates are energetic people who get excited about building things, are highly analytical, and enjoy tackling new problems. You will have the opportunity to collaborate closely with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team. As an Analog IC Layout Engineer, your responsibilities will include:

  • Crafting state-of-the-art layouts for mixed-signal and analog circuits
    • Amplifiers
    • Filters
    • Switched capacitor circuits
    • Oscillators
    • Data converters
    • Power management circuits
  • Reviewing layout floorplans and analyzing high-fidelity circuits with circuit engineers
  • Physical verification of custom IC mask layouts (LVS, DRC, ERC)

Required Qualifications:

  • Bachelor of Science in Computer Engineering or related field
  • 2+ years of experience in analog and mixed-signal IC layout design
  • 1+ year experience with FinFET technologies
  • Ability to identify the best approach to solving problems

Preferred Qualifications:

  • Programming/scripting knowledge in SKILL, TCL, Shell, C/C++, and/or Python
  • Proven expertise in implementing analog and mixed-signal layout designs, achieving tight matching, low noise, and low power consumption
  • Understanding on failure-prone circuit and layout structures
  • Experience with analog DFM standards
  • Experience with layout P-cell design and implementation
  • Experience with layout automation 

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