ZipRecruiter

Log In

1

Google Asic Design Engineer Jobs in California (NOW HIRING)

Cornelis Networks

PCIe ASIC Design Engineer

San Jose, CA · On-site +1

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

SpaceX

Principal ASIC Design Engineer (Starshield)

Hawthorne, CA

$200K - $285K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

PRINCIPAL ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...

Socket.dev

ML ASIC Design Engineer

Mountain View, CA · On-site

$175 - $215/hr

Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the ... ASIC designs * Design high performance execution units, arithmetic circuits and programmable ...

New

Apple

ASIC Design Engineer

Cupertino, CA · On-site

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...

Cornelis Networks

PCIe ASIC Design Engineer

San Jose, CA · On-site

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

SpaceX

Sr. ASIC Design Engineer (Starshield)

Hawthorne, CA

$160K - $225K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

SR. ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...

SpaceX

Principal ASIC Design Engineer (Starshield)

Hawthorne, CA · On-site

$200K - $285K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

PRINCIPAL ASIC DESIGN ENGINEER (STARSHIELD) Starshield leverages SpaceX's Starlink technology and launch capability to support national security efforts. While Starlink is designed for consumer and ...

Apple

ASIC Design Engineer

Cupertino, CA · On-site

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...

Cisco

ASIC Design Engineer, STA

San Jose, CA · On-site

$155K - $222K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Your Impact As an ASIC Design Engineer on the STA team, you will play a pivotal role in extraction and static timing analysis (STA) flow development, convergence strategies, and correlation between ...

Apple

ASIC Design Engineer

Cupertino, CA

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Help architect solutions for power management of the SoC - Write microarchitecture and/or design ...

Cisco

ASIC Design Engineer, STA

San Jose, CA

$155K - $222K/yr

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

Your Impact As an ASIC Design Engineer on the STA team, you will play a pivotal role in extraction and static timing analysis (STA) flow development, convergence strategies, and correlation between ...

Cornelis Networks

Senior ASIC Design Engineer

San Jose, CA · On-site

  • Medical

  • Dental

  • Vision

  • Life

  • Retirement

  • PTO

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

previous pagenext page

Showing results 21-40

All JobsGoogle Asic Design Engineer JobsGoogle Asic Design Engineer Jobs in California

Google Asic Design Engineer information

See California salary details

$92.8K

$148.2K

$199.4K

How much do google asic design engineer jobs pay per year?

As of Aug 14, 2026, the average yearly pay for google asic design engineer in California is $148,229.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,800.00 and $177,600.00 per year, depending on experience, location, and employer.

What is the difference between Google Asic Design Engineer vs Google FPGA Design Engineer?

AspectGoogle Asic Design EngineerGoogle FPGA Design Engineer
Required CredentialsBachelor's/Master's in Electrical Engineering or Computer Engineering; experience in ASIC designBachelor's/Master's in Electrical Engineering or Computer Engineering; FPGA design experience
Work EnvironmentDesigning custom silicon chips for Google productsDeveloping and testing FPGA prototypes for hardware acceleration
Employer & Industry UsagePrimarily in semiconductor and hardware design teams at GoogleHardware prototyping and acceleration teams at Google

The main difference between a Google Asic Design Engineer and a Google FPGA Design Engineer lies in their focus: ASIC engineers design custom chips for optimized performance, while FPGA engineers develop flexible hardware prototypes using field-programmable gate arrays. Both roles require strong electrical engineering skills but serve different stages of hardware development.

How does a Google ASIC Design Engineer typically collaborate with cross-functional teams during the chip development process?

As a Google ASIC Design Engineer, you will work closely with teams such as architecture, verification, software, and hardware validation to ensure successful chip delivery. Collaboration often involves regular meetings to align on design specifications, resolve integration issues, and discuss performance optimization. Effective communication is essential, as you’ll need to translate requirements from system architects into detailed hardware designs and provide feedback to verification and validation teams. This cross-functional interaction fosters a dynamic work environment and helps ensure the final product meets Google's rigorous standards.

What does a Google ASIC Design Engineer do?

A Google ASIC Design Engineer is responsible for designing and developing custom integrated circuits, known as Application-Specific Integrated Circuits (ASICs), that power Google's data centers, cloud infrastructure, and consumer devices. Their work involves collaborating with cross-functional teams to define requirements, create architecture, perform logic and physical design, and validate the silicon before production. They use advanced design tools and methodologies to ensure high performance, low power consumption, and reliability. Ultimately, their contributions help improve the efficiency and capabilities of Google's hardware products.

What are the key skills and qualifications needed to thrive as a Google ASIC Design Engineer, and why are they important?

To thrive as a Google ASIC Design Engineer, you need a strong background in electrical engineering, digital logic design, and experience with ASIC development, typically backed by a relevant degree. Familiarity with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and an understanding of SoC architectures are essential, and related certifications can be valuable. Strong problem-solving skills, attention to detail, and effective teamwork and communication abilities help set candidates apart. These skills are crucial for designing reliable, high-performance ASICs that meet Google's specifications and project timelines.

What are popular job titles related to Google Asic Design Engineer jobs in California?

For Google Asic Design Engineer jobs in California, the most frequently searched job titles are:

What job categories do people searching Google Asic Design Engineer jobs in California look for?

The top searched job categories for Google Asic Design Engineer jobs in California are:

What cities in California are hiring for Google Asic Design Engineer jobs?

Cities in California with the most Google Asic Design Engineer job openings:

Google Asic Design Engineer jobs near you
Infographic showing various Google Asic Design Engineer job openings in California as of August 2026, with employment types broken down into 67% Full Time, and 33% Contract. Highlights an 67% In-person, and 33% Remote job distribution, with an average salary of $148,229 per year, or $71.3 per hour.

Senior ASIC Design Engineer - Hardware

Nvidia

Santa Clara, CA • On-site

Full-time

Re-posted 23 days ago

Nvidia rating

9.6

Company rating: 9.6 out of 10

Based on 17 frontline employees who took The Breakroom Quiz

7th of 244 rated software companies

Job description

We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of exceptional people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

What you'll be doing:

  • As a key member of the Design team, you will be responsible for the implementation of GPU sub-system modules.

  • Make architectural trade-offs based on features, performance requirements and system limitations.

  • You are expected to come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.

  • Support post-silicon validation activities.

  • Work with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and back-end teams to accomplish your tasks.

What we need to see:

  • Masters Degree (or equivalent experience) in Electrical Engineering or Computer Engineering.

  • 5+ years of experience working on ASIC design and development.

  • Experience in micro-architecture and RTL development of complex designs in Verilog.

  • Exposure to Digital systems and VLSI design, Computer Architecture, Computer Arithmetic, CMOS transistors and circuits is required.

  • Understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.

  • Prior experience with arbiters, scheduling, synchronization & bus protocols, interconnect networks and/or caches is desirable.

Ways to stand out from the crowd:

  • Knowledge of PCI-Express (Gen 3 and above) or CXL protocol is very helpful; your firsthand design experience on it is a big plus.

  • Python, Perl and C/C++ programming language experience desirable.

  • Good debugging and analytical skills.

  • Strong interpersonal skills and ability & desire to work as a great teammate.

NVIDIA is widely considered to be one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the fastest and most power efficient chips in their class? If so, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until January 13, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

What Nvidia employees say

Pay

Benefits

Hours and flexibility

Workplace

Get the full story on Breakroom

Nvidia logo

About Nvidia

Sourced by ZipRecruiter

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1993

View All Nvidia Jobs

Apply