Syracuse, NY · On-site
$128.50K - $165K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Syracuse, NY · On-site
$128.50K - $165K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$125.80K - $161.60K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$125.80K - $161.60K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$122.60K - $157.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$122.60K - $157.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$128.10K - $164.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$128.10K - $164.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$106.20K - $136.40K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$106.20K - $136.40K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$116.70K - $149.90K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$116.70K - $149.90K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Rochester, NY · On-site
$128.30K - $164.80K/yr
Job Title - FPGA developer/ Electrical Engineer Location - Rochester, NY Full Time The candidate will function in an FPGA developer/verification role, working in a cross functional team environment ...
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Rochester, NY · On-site
$128.30K - $164.80K/yr
Job Title - FPGA developer/ Electrical Engineer Location - Rochester, NY Full Time The candidate will function in an FPGA developer/verification role, working in a cross functional team environment ...
Indianapolis, IN · On-site
$124.30K - $159.60K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Indianapolis, IN · On-site
$124.30K - $159.60K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Tampa, FL · On-site
$122.90K - $157.80K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Tampa, FL · On-site
$122.90K - $157.80K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Moorestown, NJ · On-site
$128.20K - $164.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Moorestown, NJ · On-site
$128.20K - $164.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Colorado Springs, CO · On-site
$128.10K - $164.60K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Colorado Springs, CO · On-site
$128.10K - $164.60K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Boise, ID · On-site
$123.70K - $158.90K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Boise, ID · On-site
$123.70K - $158.90K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$128.10K - $164.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$128.10K - $164.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Lafayette, IN · On-site
$125.10K - $160.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Lafayette, IN · On-site
$125.10K - $160.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Austin, TX · On-site
$128.90K - $165.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Austin, TX · On-site
$128.90K - $165.50K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Hawthorne, CA · On-site
$183K - $230K/yr
Lead FPGA Engineer Department ... Avionics Employment Type: Full Time Location: Hawthorne, California Reporting To: Jake Peery ...
Hawthorne, CA · On-site
$183K - $230K/yr
Lead FPGA Engineer Department ... Avionics Employment Type: Full Time Location: Hawthorne, California Reporting To: Jake Peery ...
Lafayette, IN · On-site
$125.10K - $160.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Lafayette, IN · On-site
$125.10K - $160.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Madison, WI · On-site
$131K - $168.30K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Madison, WI · On-site
$131K - $168.30K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Reston, VA · On-site
$135.20K - $173.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Reston, VA · On-site
$135.20K - $173.70K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Schaumburg, IL · On-site
$127.70K - $164K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
Schaumburg, IL · On-site
$127.70K - $164K/yr
... Full Time Travel required to 10%. Must be able to apply for and maintain a U.S. Government Security Clearance FPGA Engineer The EndoSec FPGA Engineer is responsible for the design, development ...
$85K - $95.3K
1% of jobs
$95.3K - $105.6K
4% of jobs
$105.6K - $116K
6% of jobs
$116K - $126.3K
9% of jobs
$128.4K is the 25th percentile. Wages below this are outliers.
$126.3K - $136.6K
23% of jobs
The median wage is $141.4K / yr.
$136.6K - $146.9K
14% of jobs
$146.9K - $157.2K
10% of jobs
$163.2K is the 75th percentile. Wages above this are outliers.
$157.2K - $167.5K
14% of jobs
$167.5K - $177.9K
11% of jobs
$177.9K - $188.2K
5% of jobs
$188.2K - $198.5K
3% of jobs
$85K
$147.3K
$198.5K
| Aspect | Full Time Fpga Programming | FPGA Design Engineer |
|---|---|---|
| Required Skills | Hardware description languages (VHDL, Verilog), programming, debugging | Hardware description languages, digital design, simulation, verification |
| Work Environment | Embedded systems, hardware development teams, manufacturing | Design teams, R&D labs, hardware development |
| Industry Usage | Consumer electronics, telecommunications, aerospace | Semiconductor companies, defense, high-performance computing |
Full Time Fpga Programming focuses on coding and implementing FPGA logic, often emphasizing programming skills. FPGA Design Engineer involves designing and verifying FPGA architectures, requiring a broader understanding of digital design. Both roles overlap in skills but differ in scope and responsibilities.
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RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System Integration, Hardware Security, Xilinx, Simulation, IP core, Versal, Stratix, concept to deployment, Vivado, GHDL, Questa, Quartus Prime, Zynq, Agilex, AXI, ACE, Avalon, FPGA verification tools, reverse engineering, cocotb, pyuvm
Full Time
Travel required to 10%.
Must be able to apply for and maintain a U.S. Government Security Clearance
FPGA Engineer
The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications.
Key Responsibilities
FPGA Design and Development: Design and develop IP cores and FPGA configurations implementing the latest in leakage-resilient hardware cryptography algorithms using state-of-the-art FPGA hardware.
Modeling and Simulation: Use simulation tools and verification frameworks to ensure mathematically-correct logic before hardware deployment.
Hardware/Software Design: Work closely with other engineers to integrate FPGA designs with application software and embedded systems. Implement embedded software-based testing solutions where applicable to validate FPGA designs.
Performance Optimization: Optimize FPGA designs for timing, resource utilization, and throughput. Identify and resolve system bottlenecks.
Testing and Validation: Create comprehensive test and verification plans for FPGA components, conduct unit and integration testing, and validate hardware performance against requirements in a remote environment.
System Integration: Ensure seamless integration between internally-developed and third-party IP cores, FPGA designs, and embedded systems. Collaborate with other engineers to develop and maintain system-level architecture.
Troubleshooting and Debugging: Utilize debugging tools and techniques to diagnose and resolve issues within FPGA designs and hardware platforms.
Documentation: Prepare detailed documentation, including design specifications, testing protocols, and user guides, to support system development and maintenance.
Continuous Learning: Actively stay up-to-date with the latest advancements in FPGA technology and hardware security to continually refine and enhance system capabilities.
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Guided missile and space vehicle manufacturing
11 - 50 Employees
Washington, DC, US
2013
