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Manager Fpga Vhdl Jobs (NOW HIRING)

L3HHCM20

Senior FPGA Engineer, VHDL

San Diego, CA

$127K - $236K/yr

Senior FPGA Engineer, VHDL Job Code: 42454 Job Location: San Diego, CA Job Schedule: 9/80 (employee ... Strong analytical skills, attention to detail, and the ability to manage multiple projects are ...

Trident Systems Inc.

Senior FPGA Engineer

Fairfax, VA · On-site

$134K - $172K/yr

Senior Manager, FPGA Engineering Supervises Others: No At Trident Systems Space Electronic Systems ... Create and maintain complete FPGA designs using a combination of VHDL and Vivado IP Integrator with ...

Harris Corporation

Senior FPGA Engineer, VHDL

San Diego, CA · On-site

$127K - $236K/yr

Senior FPGA Engineer, VHDL Job Code: 42454 Job Location: San Diego, CA Job Schedule: 9/80 (employee ... Strong analytical skills, attention to detail, and the ability to manage multiple projects are ...

Trident Systems Inc.

Senior FPGA Engineer

Fairfax, VA · On-site

$97 - $181/hr

Senior Manager, FPGA Engineering Supervises Others: No At Trident Systems Space Electronic Systems ... Create and maintain complete FPGA designs using a combination of VHDL and Vivado IP Integrator with ...

Trident Systems LLC

Senior FPGA Engineer

Fairfax, VA · On-site

$97K - $181K/yr

Senior Manager, FPGA Engineering Supervises Others: No At Trident Systems Space Electronic Systems ... Create and maintain complete FPGA designs using a combination of VHDL and Vivado IP Integrator with ...

Socket.dev

FPGA/ASIC Engineer

Vernon Hills, IL · On-site

$150 - $180/hr

The FPGA/ASIC Engineer will report to the Manager, FPGA/ASIC. This role is a regular, full-time ... VHDL, Verilog, etc.) for FPGA development and simulation * HDL design and coding best practices for ...

Canon-Medical-System

FPGA/ASIC Engineer

Vernon Hills, IL · On-site

$150 - $180/hr

The FPGA/ASIC Engineer will report to the Manager, FPGA/ASIC. This role is a regular, full-time ... VHDL, Verilog, etc.) for FPGA development and simulation * HDL design and coding best practices for ...

Canon Medical Research Usa, Inc.

$150 - $180/hr

The FPGA/ASIC Engineer will report to the Manager, FPGA/ASIC. This role is a regular, full-time ... VHDL, Verilog, etc.) for FPGA development and simulation * HDL design and coding best practices for ...

Prolim Global

Engineer Digital 3

San Diego, CA · On-site

$130 - $145/hr

Design, develop, integrate, and test VHDL-based FPGA digital designs for Software Defined Radio ... Advisory, PLM Software/Services, Program Management, Solution Architecture Training/Staffing, Cloud ...

AVTC Group

FPGA Engineer

Tucson, AZ · On-site

$122K - $157K/yr

Designs are implemented using VHDL Applications: gigabit serial interfaces, Radio Frequency (RF ... Design documentation and configuration management are required. Responsibilities to Anticipate: • ...

PSRTEK

FPGA Engineer at Waukesha, WI

Waukesha, WI · On-site

$130K - $167K/yr

Position: FPGA Engineer - VHDL Experience: -5+ Years Location: -Waukesha, WI(Onsite ... Contribute to requirements traceability (Jama/DOORS), risk management (ISO 14971), and verification ...

Anduril Industries

FPGA Verification Engineer

Waltham, MA

$132K - $182K/yr

Testbench development for the verification of RTL blocks using VHDL or SystemVerilog * Recommend ... Experience using revision control systems such as Git or Subversion to manage source code ...

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$85K

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How much do manager fpga vhdl jobs pay per year?

As of Aug 18, 2026, the average yearly pay for manager fpga vhdl in the United States is $147,315.00, according to ZipRecruiter salary data. Most workers in this role earn between $130,000.00 and $167,000.00 per year, depending on experience, location, and employer.

What is the difference between Manager Fpga Vhdl vs FPGA Engineer?

AspectManager Fpga VhdlFPGA Engineer
ResponsibilitiesOversees FPGA projects, manages teams, and coordinates development processesDesigns, develops, and tests FPGA hardware and VHDL code
Required SkillsLeadership, project management, FPGA knowledge, VHDL understandingVHDL coding, FPGA architecture, hardware design
Work EnvironmentTeam management, project planning, client communicationHands-on hardware design, coding, testing
CertificationsFPGA/VHDL certifications, project management credentialsVHDL/FPGA design certifications, hardware development experience

In summary, a Manager Fpga Vhdl focuses on leading FPGA projects and managing teams, while an FPGA Engineer is primarily involved in designing and implementing FPGA hardware and VHDL code. Both roles require FPGA and VHDL expertise, but differ in scope and responsibilities.

What is the FPGA manager?

An FPGA manager is a professional responsible for overseeing the design, implementation, and validation of FPGA (Field-Programmable Gate Array) hardware projects. They often work with VHDL or Verilog programming languages, FPGA development tools, and hardware testing environments to ensure reliable and efficient FPGA performance.
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Manager Fpga Vhdl jobs near you
Infographic showing various Manager Fpga Vhdl job openings in the United States as of August 2026, with employment types broken down into 88% Full Time, 11% Part Time, and 1% Contract. Highlights an 81% Physical, 2% Hybrid, and 17% Remote job distribution, with an average salary of $147,315 per year, or $70.8 per hour.

FPGA VHDL Design Engineer US Citizenship required

Science Referral Network

Tucson, AZ • On-site

$116K - $160K/yr

Full-time

Re-posted 14 days ago

Job description

Company Description

About Science Referral Network

We maintain a global network of well connected professionals in science, technology, engineering, and mathematics who are interested in working with us to help organizations recruit and hire the right technical talent for even the most specialized of tasks. Our network consists of both subject matter experts in a wide variety of technical areas and senior leaders at some of the world's most innovative, cutting edge organizations. We employ a system of strategic research and confidential targeted crowdsourcing throughout this network to help our clients identify and hire the talent they need.

Much more than just a database, we are continually working to strengthen all of the individual connections that make up our network. We strive to develop mutually beneficial, trusting relationships by actively engaging with our network members. This creates the confidence and collaboration that is necessary for our continued success. We believe that our integrity is our greatest asset and we value people over process. We are steadfast in our commitment to the highest ethical principles in all of our business dealings and endeavor to add value in any way we can.

Job Description

We have a PERM position in sunny Tucson, AZ for an ASIC FPGA Designer. There are several positions available at all levels. The job description is below. If you are still available please send an updated resume, your salary requirements, date of availability, and your citizenship status

(***OUR CLIENT CANNOT ACCEPT H1B, H2B, F1, TN1 VISAS OR GREEN CARD CANDIDATES***). We cannot work with outside parties or do C2C.

This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance. 

Thank you!

Dee Smith

Qualifications

This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance. The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process. Security clearance factors include, but are not limited to, allegiance to the US, foreign influence, foreign preference, criminal conduct, security violations and drug involvement. Employment is contingent on other factors, including, but not limited to, background checks and drug screens

Required Skills for Principal Electrical Engineer (ASIC Design) 

FPGA ASIC design experience required. Knowledge and experience including: 

- Development of design documentation 

- Application of configuration management tools 

- Application of standard ASIC development design flows and methodologies for SOC design 

- Use of VHDL and Verilog 

- Use of ARM processor cores and associated peripherals 

- ASIC supplier management and technical oversight 

- Expert level knowledge of industry standard ASIC development tools 

Candidates must have broad technical knowledge and experience and be expert in the design of complex ASICs. Must have written VHDL, simulated, synthesized, placed and routed, integrated and tested designs on target hardware. Candidates must have an understanding and appreciation of technical themes and concepts and the ability to develop solutions independently, but also be able to work with systems engineers, software teams and peers to define requirements. Candidates must be able to develop technical solutions to complex problems that require the regular use of ingenuity and creativity. 

Demonstrated experience and success in applying best in class design methodologies and tools is required. Working knowledge of Microsoft Office products required. Candidates must be highly motivated, high performers with excellent verbal and written communication skills and a strong desire to learn and contribute in a fast-paced team environment. Candidates must be able to apply extensive technical expertise, and have knowledge of other disciplines related to FPGA and ASIC design. Ability to perform work without appreciable direction is required. Exceptional communication and leadership skills are required. 

Experience working in a distributed design and development environment, including tools and methodologies is required. 

Desired Qualifications: 

- FPGA design experience or desire to perform FPGA design 

- Knowledge and experience in the use of assertions 

- UVM/OVM experience 

- Cryptographic experience highly desired 

Knowledge and experience in the design of FPGA for gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces highly desired. Knowledge and demonstrated experience with System Verilog and Unified Verification Methodology highly desired. Knowledge of C programming and scripting languages such as Perl or Python highly desired. Knowledge of embedded systems design using Microblaze, Nios or ARM processors a strong plus. FPGA design experience using a Linux based development environment highly desired. 

Required Education: 

Bachelor of Science in Electrical Engineering 

Desired Education: 

Master of Science in Electrical Engineering 

ABOUT OUR CLIENT: 

14,000 employees 

Headquartered in Tucson, Ariz. 

World's largest developer, producer and integrator of weapon systems More than 1.5 million missiles produced since 1954 

Broad weapons portfolio 

Missiles 

Smart munitions 

Projectiles 

Kinetic kill vehicles 

Directed energy weapons 

Mounted reconnaissance, surveillance and target acquisition

Customers: All U.S. military services; allied forces of more than 50 countries

Additional Information

All your information will be kept confidential according to EEO guidelines.

This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance. 

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