ASIC/RTL Design Engineer
San Jose, CA · On-site
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip ... SoC Architecture; knowledge and hand-on experience from industry ASIC design flow including RTL ...
ASIC/RTL Design Engineer
San Jose, CA · On-site
Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip ... SoC Architecture; knowledge and hand-on experience from industry ASIC design flow including RTL ...
RTL Engineer - Networking ASIC Saratoga, CA Full-Time Join an innovative hardware company building ... Design packet buffering, queuing, and scheduling microarchitecture * Implement high-speed ...
RTL Engineer - Networking ASIC Saratoga, CA Full-Time Join an innovative hardware company building ... Design packet buffering, queuing, and scheduling microarchitecture * Implement high-speed ...
ASIC/RTL Design Engineer 5
San Jose, CA · On-site
$82 - $86/hr
Hands-on experience with industry ASIC design flow including RTL coding, debugging/verification ... We deliver agile, scalable talent solutions across IT, engineering, life sciences, clinical, and ...
Quick apply
ASIC/RTL Design Engineer 5
San Jose, CA · On-site
$82 - $86/hr
Hands-on experience with industry ASIC design flow including RTL coding, debugging/verification ... We deliver agile, scalable talent solutions across IT, engineering, life sciences, clinical, and ...
About the role SambaNova Systems is looking for a Principal RTL Design Engineer to own the ... MS or PhD in EE, CE, or CS with 10+ years of experience in ASIC RTL design
About the role SambaNova Systems is looking for a Principal RTL Design Engineer to own the ... MS or PhD in EE, CE, or CS with 10+ years of experience in ASIC RTL design
ASIC/RTL Design Engineer 2
San Jose, CA · On-site
$60 - $62/hr
Hands-on experience in industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure. * Working knowledge of Client cores and other I/O standard ...
Quick apply
ASIC/RTL Design Engineer 2
San Jose, CA · On-site
$60 - $62/hr
Hands-on experience in industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure. * Working knowledge of Client cores and other I/O standard ...
ASIC/RTL Design Engineer Primary Skills : RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime). Location: San Jose CA Duration : 12 ...
ASIC/RTL Design Engineer Primary Skills : RTL coding, TCL coding, Python coding, understanding of different CAD tools (synthesis, lint, CDC, RDC, PrimeTime). Location: San Jose CA Duration : 12 ...
ASIC RTL/SoC Design Engineer
Fremont, CA · On-site
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
Fremont, CA · On-site
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture specification through production silicon, working on complex IP design. THE PERSON: The ideal ...
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture specification through production silicon, working on complex IP design. THE PERSON: The ideal ...
Integration RTL Design Engineer
San Jose, CA · On-site
$145K/yr
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture specification through production silicon, working on complex IP design. THE PERSON: The ideal ...
Integration RTL Design Engineer
San Jose, CA · On-site
$145K/yr
As a Senior ASIC Design Engineer, you will own the complete RTL design lifecycle from micro-architecture specification through production silicon, working on complex IP design. THE PERSON: The ideal ...
ASIC RTL/SoC Design Engineer
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
San Jose, CA · On-site
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
ASIC RTL/SoC Design Engineer
San Jose, CA · On-site
$110K - $300K/yr
Lead RTL design, simulation, and verification efforts for TetraMem ASIC/SoC products, ensuring ... Play a mentorship role by guiding and coaching junior engineers, sharing expertise and best ...
RTL Design Engineer Building AI chips that are hard-coded for individual model architectures. RTL ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
Quick apply
RTL Design Engineer Building AI chips that are hard-coded for individual model architectures. RTL ... both our existing and upcoming ASIC designs. In this role, you will work closely with ...
Principal RTL Design Engineer
San Jose, CA · On-site
$180 - $255/hr
Set the technical bar in design reviews and mentor design engineers Required qualifications * BS or MS in EE, CE, or CS with 7+ years (or equivalent) of industry experience in ASIC RTL design.
New
Principal RTL Design Engineer
San Jose, CA · On-site
$180 - $255/hr
Set the technical bar in design reviews and mentor design engineers Required qualifications * BS or MS in EE, CE, or CS with 7+ years (or equivalent) of industry experience in ASIC RTL design.
New
Set the technical bar in design reviews and mentor design engineers Required qualifications * BS or MS in EE, CE, or CS with 7+ years (or equivalent) of industry experience in ASIC RTL design
Set the technical bar in design reviews and mentor design engineers Required qualifications * BS or MS in EE, CE, or CS with 7+ years (or equivalent) of industry experience in ASIC RTL design
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
Staff RTL Engineer - Ethernet Saratoga, CA Full-Time Join a cutting-edge hardware company building ... MSEE with 8-15 years of ASIC/RTL design experience * Strong expertise in Ethernet 802.3 protocols ...
Staff RTL Engineer - Ethernet Saratoga, CA Full-Time Join a cutting-edge hardware company building ... MSEE with 8-15 years of ASIC/RTL design experience * Strong expertise in Ethernet 802.3 protocols ...
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
... RTL designs - Working with design verification and formal verification teams to verify ... front-end ASIC RTL design Tight-knit collaboration skills with excellent written and verbal ...
Description As an ASIC Design Engineer on the Silicon Security team, you will be responsible for the micro-architecture, RTL design and integration of secure subsystems. Your responsibilities will ...
Description As an ASIC Design Engineer on the Silicon Security team, you will be responsible for the micro-architecture, RTL design and integration of secure subsystems. Your responsibilities will ...
Freelance Asic Rtl Design Engineer information
See Milpitas, CA salary details
$27.41 is the 25th percentile. Wages below this are outliers.
$17.37 - $29.80
31% of jobs
The median wage is $37.46 / hr.
$29.80 - $42.22
31% of jobs
$42.22 - $54.65
4% of jobs
$65.53 is the 75th percentile. Wages above this are outliers.
$54.65 - $67.08
10% of jobs
$67.08 - $79.51
9% of jobs
$79.51 - $91.94
5% of jobs
$91.94 - $104.36
0% of jobs
$104.36 - $116.79
8% of jobs
$116.79 - $129.22
0% of jobs
$129.22 - $141.65
0% of jobs
$141.65 - $154.08
1% of jobs
$17
$55
$154
How much do freelance asic rtl design engineer jobs pay per hour?
As of Aug 23, 2026, the average hourly pay for freelance asic rtl design engineer in Milpitas, CA is $55.60, according to ZipRecruiter salary data. Most workers in this role earn between $28.32 and $72.02 per hour, depending on experience, location, and employer.
Are freelance ASIC RTL design engineers in demand?
Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this flexible work arrangement.
How much does a Freelance ASIC RTL Design Engineer make?
Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Milpitas, CA?
The most popular types of Asic Rtl Design Engineer jobs in Milpitas, CA are:
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For Freelance Asic Rtl Design Engineer jobs in Milpitas, CA, the most frequently searched job titles are:
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The top searched job categories for Freelance Asic Rtl Design Engineer jobs in Milpitas, CA are:
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Cities near Milpitas, CA with the most Freelance Asic Rtl Design Engineer job openings:
Job description
- The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and *** internal IPs.
- Successful candidates will be responsible for leading, and participating in, the design of leading edge SoC?s in advanced digital CMOS processes.Our RTL Design Engineers are expected contribute in all aspects of SoC design including: Chip definition, Architecture development and modeling, Development of micro-architectural specifications, Conversion of micro-architectural specifications to logic implementation, Verification, emulation, debug, synthesis, and timing closure, Interfacing with physical execution, software, and silicon bring-up teams.
EXPERIENCE AND EDUCATION:
- SoC Architecture; knowledge and hand-on experience from industry ASIC design flow including RTL coding, debugging/verification, and supporting synthesis and timing closure.
- Working knowledge of ARM cores and other I/O standard interfaces. An ideal candidate would also exhibit
- Strong communication and documentation skills, Good organizational, time management and multitasking skills, Strong initiative and discipline to follow-through, Technical leadership. 10+ years of experience.
About Saicon consultants
Sourced by ZipRecruiter
Company size
201 - 500 Employees
Headquarters location
Overland Park, KS, US
Year founded
1998