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Freelance Asic Rtl Design Engineer Jobs in Tracy, CA

Senior FPGA Engineer

Pleasanton, CA · On-site

$130K - $155K/yr

Our team of engineers, scientists, software developers, and operations professionals works together ... Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold ...

Our team of engineers, scientists, software developers, and operations professionals works together ... Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold ...

Senior FPGA Engineer

Pleasanton, CA · On-site

$130K - $155K/yr

Our team of engineers, scientists, software developers, and operations professionals works together ... Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold ...

Staff FPGA Engineer

Pleasanton, CA · On-site

$150K - $180K/yr

Our team of engineers, scientists, software developers, and operations professionals works together ... Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold ...

Our team of engineers, scientists, software developers, and operations professionals works together ... Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold ...

Staff FPGA Engineer

Pleasanton, CA · On-site

$150K - $180K/yr

Our team of engineers, scientists, software developers, and operations professionals works together ... Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold ...

... engineering, or equivalent. * 15+ years of experience with ARM CPU‑based ASIC/SOC architecture and design. * Experience and knowledge of 3rd‑party IP ecosystem. * Experience with RTL coding for a ...

Senior Electrical Engineer- Space

Pleasanton, CA · On-site

$118K - $154K/yr

Design and adapt circuits for reliable operation in the LEO radiation and thermal environment. * Partner with firmware and RTL engineers on radiation-tolerant techniques (error detection/correction ...

Design and adapt circuits for reliable operation in the LEO radiation and thermal environment. * Partner with firmware and RTL engineers on radiation-tolerant techniques (error detection/correction ...

Senior Electrical Engineer- Space

Pleasanton, CA · On-site

$118K - $154K/yr

Design and adapt circuits for reliable operation in the LEO radiation and thermal environment. * Partner with firmware and RTL engineers on radiation-tolerant techniques (error detection/correction ...

Senior Electrical Engineer- Space

Pleasanton, CA · On-site

$119K - $155K/yr

Design and adapt circuits for reliable operation in the LEO radiation and thermal environment. * Partner with firmware and RTL engineers on radiation-tolerant techniques (error detection/correction ...

Maintain precise design records within a cloud-based PLM system, managing revisions and Engineering ... ASIC Knowledge: Foundational skills in defining, simulating, and verifying ASIC designs. * Industry ...

Creative Design: Develop safe and economical structures that fulfill projects requirements while ... IBC, ASIC 360, ASIC 341, ASIC358, ASCE7, AISI, etc. * Professional Engineer registration in the ...

Senior Electrical Engineer - Space

Pleasanton, CA · On-site

$119K - $155K/yr

Design and adapt circuits for reliable operation in the LEO radiation and thermal environment. * Partner with firmware and RTL engineers on radiation-tolerant techniques (error detection/correction ...

... engineering or equivalent. * 15+ years of experience with ARM CPU based ASIC/SOC architecture and design. * Experience and knowledge of 3rd party IP eco system. * Experience with RTL coding for a ...

Data Engineer

Pleasanton, CA · On-site

$60 - $65/hr

In this role, you will design, build, and optimize cloud-native data platforms on Google Cloud ... freelancers - which sets us apart in the industries we serve. About Solomon Page Founded in 1990 ...

Our team of engineers, scientists, software developers, and operations professionals works together ... A background in defining, simulating, and verifying ASIC designs. * Specialized Design: Previous ...

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Freelance Asic Rtl Design Engineer information

See Tracy, CA salary details

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How much do freelance asic rtl design engineer jobs pay per hour?

As of Aug 2, 2026, the average hourly pay for freelance asic rtl design engineer in Tracy, CA is $51.36, according to ZipRecruiter salary data. Most workers in this role earn between $26.15 and $66.49 per hour, depending on experience, location, and employer.
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Senior FPGA Engineer

Vector Atomic

Pleasanton, CA • On-site

$130K - $155K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 8 days ago


Job description

Vector Atomic, an IonQ company, is building quantum technology to transform navigation, timing, geophysical exploration, and telecommunications. Our team of engineers, scientists, software developers, and operations professionals works together to solve complex challenges and turn bold ideas into real-world solutions. We value collaboration, curiosity, and diverse perspectives, and we give every team member the opportunity to make an immediate impact while growing their skills. If you're excited to work on breakthrough technology in a fast-paced, hands-on environment, we'd love to hear from you.
We are looking for a highly skilled Senior FPGA Engineer to join our team. The successful candidate will be instrumental in designing and implementing FPGA-based instrument systems for the next generation of advanced quantum sensors. This role initially focuses on research and development with the goal of translating prototypes into scalable commercial products. We are looking for individual contributors who can take ownership of their projects while supporting the team's overall goals. Candidates should have strong technical experience and enjoy working collaboratively in a dynamic, interdisciplinary team.
Requirements
What You'll Do:
  • Collaborate with physicists, electronics engineers, and optical designers to define system requirements and select appropriate FPGA/SoC components along with supporting ICs.
  • Design and contribute to custom PCB layouts integrating modern FPGA/SoC devices.
  • Identify critical design challenges affecting PCB layouts to ensure robustness.
  • Develop synthesizable RTL code using Verilog or VHDL, create test benches, and prepare EDA tool support to meet performance targets.
  • Lead FPGA board bring-up integration and test activities. Develop test scripts. Compile validation documentation.
What We're Looking For:
  • Bachelor's or Master's degree in Electrical Engineering or a related technical discipline.
  • Minimum 5 years of relevant FPGA engineering experience for candidates with EE degrees; 7+ years for other technical degrees.
  • To comply with the US export control laws, Vector Atomic employees must be U.S. citizens (born or naturalized), lawful U.S. permanent residents (green card holders), and certain categories of refugees, and asylees.
  • Proven ability to work effectively in laboratory environments.
  • Strong verbal and written communication skills.
  • Expertise in HDL programming (Verilog and/or VHDL) for synthesizable RTL and verification.
  • Experience with FPGAs and SoCs with an emphasis on AMD Zynq and AMD Ultrascale+
  • Proficiency using EDA tools such as Vivado and Questa.
  • Hands-on experience with laboratory test and measurement instruments (oscilloscopes, power supplies, pulse generators, logic and protocol analyzers).
  • Ability to collaborate with hardware engineers on FPGA/SoC PCB board designs.
  • Experience writing timing constraints (SDC) to achieve timing closure on high-speed FPGA designs.
  • Familiarity with common communication protocols (SPI, I2C, AXI, Avalon, Ethernet, AMBA, Wishbone).
  • Skill in scripting EDA tools, preferably TCL.
  • Understanding of practical RTL design issues such as latency, jitter, metastability, setup/hold timing, and multicycle paths.
  • Familiarity with revision control and issue tracking software like Git and Jira.
Preferred Experience:
  • Experience with formal verification methodologies and languages (PSL, SystemVerilog, UVVM, UVM, or OVM).
  • Knowledge of embedded Linux on ARM platforms, UBoot, and device trees.
  • Experience creating custom Linux builds using Yocto, PetaLinux, or OpenEmbedded.
  • Knowledge of hardware signal processing techniques.
  • A background working with CI/CD systems, virtualization and deployment technologies.

Benefits
Vector Atomic values teamwork, open and honest discourse, and work-life balance. We offer competitive compensation and benefits including:
  • Platinum-level family health coverage (medical, dental, vision)
  • Health and dependent care Flexible Spending Accounts (FSA)
  • Employer 401(k) contributions
  • 20 days of paid time off / 11 paid holidays
  • Paid parental leave
  • Fully stocked kitchen

Pay Range
The approximate base salary range for this position is $130,000 - $155,000 per year. The total compensation package includes base, bonus, equity and benefits. Please note that it is less common for candidates to be hired at the top of this range, as final compensation is determined by factors such as job-related knowledge, skills, and experience.
Vector Atomic is an equal opportunity employer and we welcome applications from all backgrounds regardless of race, color, religion, sex, national origin, ancestry, age, marital status, sexual orientation, gender identity, veteran status, disability, or any other classification protected by law.
Vector Atomic does not accept unsolicited resumes from individual recruiters or third-party recruiting agencies in response to job postings. No fee will be paid to third parties who submit unsolicited candidates directly to our hiring managers or HR team.