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Entry Level Analog Layout Design Engineer Jobs in Portland, OR

Intel

Analog Circuit Design Engineer

Hillsboro, OR · On-site

$164K - $232K/yr

About the Role We are seeking a highly motivated Analog Circuit Design Engineer with a strong ... Create floorplans and guide layout with attention to matching, parasitics, current density, and ...

Apple

SerDes Circuit Design Engineer

Beaverton, OR · On-site

$210K/yr

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team! Our team ... You will drive mask design to implement layout view of designs. You will closely work with SOC ...

Apple

SerDes Circuit Design Engineer

Beaverton, OR

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team! Our team ... You will drive mask design to implement layout view of designs. You will closely work with SOC ...

Apple

RTL Design Engineer

Beaverton, OR · On-site

... Engineer. This is an exciting position in the world class Apple mixed-signal silicon design team ... mixed-signal and analog circuit design and features. You will work with a variety of flows ...

ISAT Total Support

Design Engineer

Portland, OR · On-site

... layout on projects for all trades, configurations, and for the CBC, IBC, and UFC. • Product ... to entry-level with strong aptitude) • Experience in non-structural seismic applications is a ...

Apple

Custom Circuits Design Engineer

Beaverton, OR · On-site

You and your team will apply engineering fundamentals and start from scratch if needed, bringing ... layout team to complete the design and oversee the layout quality. - Develop / drive circuit ...

Noralogic Inc

Structural Design Engineer

Hillsboro, OR · On-site

Structural Design Job Location: Hillsboro, OR Job Type: Fulltime The resource is expected to work ... converged layout. This will also include, but not be limited to, meeting timing, performance ...

Apple

Custom Circuits Design Engineer

Beaverton, OR

$150K - $277K/yr

You and your team will apply engineering fundamentals and start from scratch if needed, bringing ... layout team to complete the design and oversee the layout quality. - Develop / drive circuit ...

Apple

Custom Circuits Design Engineer

Beaverton, OR

$150K - $277K/yr

You and your team will apply engineering fundamentals and start from scratch if needed, bringing ... layout team to complete the design and oversee the layout quality. - Develop / drive circuit ...

Solvenow Inc.

Layout Designer

Portland, OR

Experience in building systems mechanical design in semiconductor or related high-tech type ... of entry-level designers, intermediate-level designers are responsible for production speed ...

Unique Hardware Software Systems Company in Major Growth Mode

Be Seen First

Senior PCB Layout and Design Electrical Engineer, BSEE Preferred

Orchards, WA · On-site

$145K - $185K/yr

Experience with PCB layout and Design (Gerber Formats-Gerber Files; copper layers, solder mask ... PCB's: experience with both through-hole [thru-hole] and SMT PCB's, experience with both analog and ...

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All JobsAnalog Layout Design Engineer JobsEntry Level Analog Layout Design Engineer JobsEntry Level Analog Layout Design Engineer Jobs in Portland, OR

Entry Level Analog Layout Design Engineer information

See Portland, OR salary details

$81.7K

$197.5K

$215.3K

How much do entry level analog layout design engineer jobs pay per year?

As of Jul 19, 2026, the average yearly pay for entry level analog layout design engineer in Portland, OR is $197,507.00, according to ZipRecruiter salary data. Most workers in this role earn between $214,200.00 and $214,200.00 per year, depending on experience, location, and employer.

What does an Entry Level Analog Layout Design Engineer do?

An Entry Level Analog Layout Design Engineer is responsible for creating the physical layout of analog integrated circuits (ICs) based on circuit schematics provided by design engineers. This role involves using specialized software tools to place and route transistors, resistors, capacitors, and other components while ensuring optimal performance, manufacturability, and reliability. The engineer collaborates closely with design and fabrication teams to meet electrical and physical constraints, check for design rule violations, and prepare layouts for tape-out and production. Attention to detail and a strong understanding of semiconductor fabrication processes are essential for success in this position.

How much do analog Design Engineers make?

Entry-level analog layout design engineers typically earn between $60,000 and $90,000 annually, depending on location, education, and industry. Salaries increase with experience, specialized skills in CAD tools, and certifications in analog circuit design.

Can AI replace an analog design engineer?

AI cannot fully replace an analog layout design engineer, as the role requires complex understanding of circuit behavior, creative problem-solving, and hands-on skills that are difficult for AI to replicate. AI tools can assist with tasks like automation, verification, and optimization, but human expertise remains essential for nuanced design decisions and innovation in analog circuit design. Continuous learning and proficiency with design software are important for engineers in this field.

What is the difference between Entry Level Analog Layout Design Engineer vs Analog IC Design Engineer?

AspectEntry Level Analog Layout Design EngineerAnalog IC Design Engineer
CredentialsBachelor's in Electrical Engineering or related fieldBachelor's or Master's in Electrical Engineering or related field
Work EnvironmentDesign teams, semiconductor companies, R&D labsDesign teams, semiconductor companies, R&D labs
ResponsibilitiesCreating physical layouts of analog circuits, ensuring manufacturabilityDesigning, simulating, and verifying analog circuits at the schematic level

While both roles involve working with analog circuits, the Entry Level Analog Layout Design Engineer focuses on translating circuit schematics into physical layouts, whereas the Analog IC Design Engineer is involved in the overall circuit design and simulation process. The layout engineer specializes in physical implementation, while the IC design engineer handles the conceptual and functional aspects of analog circuits.

What are the key skills and qualifications needed to thrive as an Entry Level Analog Layout Design Engineer, and why are they important?

To thrive as an Entry Level Analog Layout Design Engineer, you need a solid understanding of analog circuit fundamentals, semiconductor physics, and a bachelor's degree in electrical engineering or a related field. Familiarity with industry-standard EDA tools like Cadence Virtuoso, along with knowledge of DRC/LVS verification processes, is typically required. Attention to detail, problem-solving abilities, and strong teamwork and communication skills help individuals excel in this role. These competencies ensure precise and efficient circuit layouts, minimize errors, and support successful collaboration in complex chip design projects.

What engineer makes $500,000 a year?

Highly experienced engineers in specialized fields such as senior software engineers, data scientists, or executive-level engineering managers can earn $500,000 or more annually. These roles often require advanced skills, extensive experience, and leadership responsibilities, typically found in large corporations or high-demand industries.

What are some common challenges faced by Entry Level Analog Layout Design Engineers, and how can they be overcome?

Entry Level Analog Layout Design Engineers often encounter challenges such as understanding complex circuit schematics, meeting stringent design constraints (like matching, parasitics, and area optimization), and adhering to foundry-specific layout rules. Collaborating closely with senior engineers and participating in design reviews can help new engineers learn best practices and avoid common pitfalls. Utilizing available design automation tools and continuously seeking feedback on their layouts are also effective strategies for overcoming these challenges and accelerating professional growth.

What is the career path for an analog design engineer?

An entry-level analog layout design engineer typically starts by gaining experience in circuit design, layout, and simulation tools such as Cadence or Mentor Graphics. With experience, they can advance to senior engineer roles, specialize in areas like RF or mixed-signal design, or move into technical leadership, project management, or design management positions. Continuing education, certifications, and developing expertise in industry standards support career progression.
What are the most commonly searched types of Analog Layout Design Engineer jobs in Portland, OR? The most popular types of Analog Layout Design Engineer jobs in Portland, OR are:
What are popular job titles related to Entry Level Analog Layout Design Engineer jobs in Portland, OR? For Entry Level Analog Layout Design Engineer jobs in Portland, OR, the most frequently searched job titles are:
What job categories do people searching Entry Level Analog Layout Design Engineer jobs in Portland, OR look for? The top searched job categories for Entry Level Analog Layout Design Engineer jobs in Portland, OR are:
Entry Level Analog Layout Design Engineer jobs near you
Analog Circuit Design Engineer

Analog Circuit Design Engineer

Intel

Hillsboro, OR • On-site

$164K - $232K/yr

Full-time

Medical, Retirement, PTO

Re-posted 27 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

11th of 143 rated electronics manufacturers

Job description

Job Details:Job Description: 

About the Role

We are seeking a highly motivated Analog Circuit Design Engineer with a strong interest in power delivery circuits and architectures. In this role, you will design and develop advanced analog and mixed-signal circuits for integrated voltage regulation and power management IPs that are critical to Intel's products.

You are passionate about solving complex challenges in power integrity, efficiency, transient response, and low-noise design, and thrive in collaborative, fast-paced environments.

Key Responsibilities

  • Design and develop analog and mixed-signal ICs for power delivery IPs, including IVRs, LDOs, DC-DC converters, and power gating circuits
  • Perform transient, AC, and noise simulations to evaluate stability, load regulation, droop response, and PSRR
  • Analyze and optimize power delivery performance, including efficiency, transient response, and power integrity
  • Conduct tradeoff analysis across power, performance, area, bandwidth, and quiescent current
  • Create floorplans and guide layout with attention to matching, parasitics, current density, and clean power routing
  • Perform power integrity analysis including IR drop, decoupling strategies, and package interaction effects
  • Collaborate with architecture, digital, layout, and platform teams to ensure robust power delivery integration
  • Develop and execute validation test plans to verify design performance against specifications
  • Support post-silicon bring-up, characterization, and debug of power delivery circuits
  • Document design methodologies, specifications, and validation results
  • Participate in design reviews and contribute to next-generation power delivery innovations

What We're Looking For

To be successful in this role, you should demonstrate the following professional traits:

  • Collaborative mindset- ability to work effectively across architecture, digital, layout, and platform teams in a fast-paced environment
  • Problem-solving drive- passionate about tackling complex engineering challenges in power integrity, efficiency, and low-noise design
  • Detail-oriented approach- disciplined in documentation, design reviews, and validation to ensure accuracy and design integrity
Qualifications:

Minimum Qualifications

You must possess one of the following education and experience combinations to be initially considered for this position:

  • Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with6+ yearsof experience, OR
  • Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with4+ yearsof experience, OR
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field with2+ yearsof experience

In addition, all candidates must have:

  • Experience in analog or mixed-signal circuit design (Amplifiers, LDOs, PLLs, ADCs, etc.)
  • Experience taking designs from circuit to layout to silicon prototype
  • Strong background in VLSI and industry-standard CAD tools for schematic and simulation, such as Cadence Spectre, AMS Designer, Virtuoso, and StarRC

Preferred Qualifications

  • Knowledge of Power Delivery, Power Management systems, or PMIC
  • Experience in mixed-signal modeling and system analysis of complex feedback systems
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, Massachusetts, Beaver Brook, US, Oregon, HillsboroBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $164,470.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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