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Eda Manager Jobs in Arizona (NOW HIRING)

MKS2 Technologies

Digital Design Engineer

Tucson, AZ · On-site

$90K - $100K/yr

Mentor Graphics / Siemens EDA (DxDesigner, xDX Designer VX) * Xilinx tools (Vivado, Zynq Ultrascale ... Ability to manage: * Technical and schedule risks * Cost reduction opportunities * Program ...

MKS2 Technologies

Digital Design Engineer

Tucson, AZ · On-site

$90K - $100K/yr

Mentor Graphics / Siemens EDA (DxDesigner, xDX Designer VX) * Xilinx tools (Vivado, Zynq Ultrascale ... Ability to manage: * Technical and schedule risks * Cost reduction opportunities * Program ...

FlexTG

Client Support Specialist

Mesa, AZ

$18.25 - $24.50/hr

Full understanding of EzMPS Database, Dynamics, Customer Portal, EDA, BLI & Zoom Search projects to ... Outsourcing background in Managed Print Services is ideal * Experience interacting with customers ...

USAA

Decision Science Analyst (Mid-level)

Phoenix, AZ · On-site +1

... EDA). * Integrates/transforms disparate data sources and determines the appropriate data hygiene ... Proficiency with Snowflake for data querying, analysis, and management in a cloud-based data ...

Intel

Senior CPU Design Verification Engineer

Phoenix, AZ · On-site

$135K - $164K/yr

Design Verification methodologies using SystemVerilog, UVM, and industrystandard EDA tools ... Experience with system boot flows, power management, and lowpower features * Familiarity with power ...

USAA

Decision Science Analyst Senior

Phoenix, AZ · On-site +1

$87K - $115K/yr

... of management. * Incorporates visualization techniques to support the relevant points of the ... EDA). * Integrates/transforms disparate data sources and determines the appropriate data hygiene ...

USAA

Decision Science Analyst Senior

Phoenix, AZ · On-site +1

$85K - $113K/yr

... of management. * Incorporates visualization techniques to support the relevant points of the ... EDA). * Integrates/transforms disparate data sources and determines the appropriate data hygiene ...

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Eda Manager information

What is the difference between Eda Manager vs Eda Engineer?

AspectEda ManagerEda Engineer
CredentialsBachelor's or Master's in Electrical Engineering, Project Management certificationsBachelor's or Master's in Electrical Engineering, relevant technical certifications
Work EnvironmentOversees teams, manages projects, coordinates with clientsDesigns and tests electrical systems, performs simulations
Industry UsageUsed in project planning, team leadership, and client communicationUsed in circuit design, simulation, and technical analysis

The main difference between an Eda Manager and an Eda Engineer lies in their roles. The Eda Manager oversees projects and teams, focusing on management and coordination, while the Eda Engineer handles technical design and analysis. Both roles require electrical engineering credentials, but their responsibilities and daily tasks differ significantly.

What are the key skills and qualifications needed to thrive as an EDA manager, and why are they important?

To thrive as an EDA Manager, you need strong expertise in electronic design automation (EDA) methodologies, semiconductor design processes, and a relevant engineering degree. Familiarity with EDA tools such as Cadence, Synopsys, and Mentor Graphics, as well as project management certifications, is often required. Excellent leadership, problem-solving, and communication skills help manage teams and coordinate complex projects. These qualifications ensure efficient workflow, high-quality chip design, and successful project delivery in the fast-paced semiconductor industry.

What are the main challenges an EDA manager faces when overseeing cross-functional design teams?

An EDA Manager often encounters challenges in aligning the goals and timelines of diverse engineering teams, such as digital, analog, and verification groups, who rely on different EDA tools and methodologies. Ensuring smooth integration of workflows, maintaining up-to-date tool expertise, and resolving toolchain compatibility issues are key aspects of the role. Additionally, EDA Managers must balance project deadlines with the need for continuous process improvement, often acting as a bridge between technical teams and upper management to communicate progress and resource needs effectively.

What is an EDA manager?

EDA Managers are professionals who oversee Electronic Design Automation (EDA) projects within semiconductor or electronics companies. Their primary responsibilities include managing teams that use specialized software tools to design, verify, and test integrated circuits (ICs) and other electronic systems. EDA Managers coordinate between engineering, software, and hardware teams to ensure project deadlines are met and quality standards are maintained. They also keep up-to-date with the latest EDA tools and methodologies to enhance productivity and optimize design flows.

What are popular job titles related to Eda Manager jobs in Arizona?

For Eda Manager jobs in Arizona, the most frequently searched job titles are:

What job categories do people searching Eda Manager jobs in Arizona look for?

The top searched job categories for Eda Manager jobs in Arizona are:

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Eda Manager jobs near you

Senior Applications and Solutions Engineer - Foundry Services

Intel Corporation

Phoenix, AZ • On-site

$122.44 - $232.19/hr

Other

Re-posted 8 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 157 rated electronics manufacturers

Job description

Position Overview

We seek a Senior ASIC Design Engineer who will provide technical support to Intel Foundry Services customers on PDKs through ASIC design implementation flows and perform ASIC physical design execution focused on complex multi-voltage domain (UPF/CPF) designs and power-intent (VCLP and Conformal LP) verification signoff. This role drives quality improvements in design kits, supports customers through successful tape-outs, and performs ASIC design services on complex multi-voltage domain designs.

Key Responsibilities
  • Provide comprehensive technical support to Intel Foundry Services customers on PDKs, digital reference flows, and digital design signoff methodologies in multi-voltage domain implementation and verification.
  • Support and deliver ASIC/Digital tool/flow/methodology solutions, especially in multi-voltage domain design implementation and verification using Cadence and Synopsys tool suites.
  • Have deep knowledge of UPF/CPF (level-shifter, isolation, power gating, retention, always-on) implementation and verification using VCLP and Conformal LP; write and debug UPF/CPF for multi-voltage domain designs.
  • Drive customer success through expert guidance and hands-on experience in ASIC design execution.
  • Drive quality improvements in design kits and documentation through ASIC design reference flow validation and comprehensive documentation review.
  • Create application notes, technical design checklists, and deliver training presentations to customers and internal teams.
  • Establish and maintain high-quality design through implementation and verification methodologies and checklists.
Core Competencies
  • Self-driven and results-oriented with ability to manage multiple tasks effectively.
  • Strong teamwork skills to drive solutions for implementation challenges.
  • Excellent analytical problem-solving capabilities for complex design issues.
  • Effective communication skills with experience in collaboration and customer feedback.
Minimum Qualifications
  • US citizenship required.
  • Ability to obtain a US Government Security Clearance.
  • Bachelor’s degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
  • 4+ years of experience with advanced CMOS processes (16 nm and below).
  • 3+ years of experience in ASIC design implementation and verification in low power, multi-voltage domain.
  • 3+ years of experience in scripting languages such as Python, Perl, Tcl, and/or shell scripting.
Preferred Qualifications
  • Active US Government Security Clearance with at least Secret level.
  • Post-graduate degree in Electrical / Computer Engineering, Computer Science, or a STEM related field.
  • Experience with state-of-the-art process technology (7 nm and below).
  • Hands-on experience in physical design implementation and verification methodology for multi-voltage domain in SoC design.
  • Experience using EDA tools for multi-power domain design (UPF/CPF) implementation and power-intent verification (VCLP, Conformal LP) at block and SOC level.
  • Experience in writing and debugging UPF/CPF for multi-voltage domain designs.
  • Customer-facing experience in technical support roles.
Benefits and Work Arrangement
  • Annual salary range: $122,440.00 – $232,190.00 USD (US locations).
  • Hybrid work model allowing split between on-site and off-site work.
EEO Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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What Intel employees say

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Benefits

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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