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Eda Manager Jobs in Arizona (NOW HIRING)

MMIC Design Engineer

Tempe, AZ · On-site

$149K - $224K/yr

Perform circuit simulation and optimization using industry-standard EDA tools. * Conduct ... Ability to manage multiple design activities in a fast-paced environment. #LI-GS1 Salary range $120 ...

Silicon Packaging Design Engineer

Phoenix, AZ · On-site

$135K/yr

... EDA) tools, including Virtuoso, Innovus, FusionCompiler, ICvalidator, and Calibre, to create robust package layouts. - Document processes and design specifications in the product lifecycle management ...

Digital Design Engineer

Tucson, AZ · On-site

$130K - $193K/yr

Experience using Mentor Graphics Design Creation (Siemens EDA) tools: DxDesigner, xDX Designer VX ... Demonstrated ability to manage technical and schedule risks and to identify cost reduction ...

New

ESD/CAD Manager Oversee both the CAD flow development and the ESD design methodology, ensuring ... EDA specific languages like Skill and TCL are a plus * Solid understanding of electrostatic ...

ESD/CAD Manager Oversee both the CAD flow development and the ESD design methodology, ensuring ... EDA specific languages like Skill and TCL are a plus * Solid understanding of electrostatic ...

Mentor Graphics / Siemens EDA (DxDesigner, xDX Designer VX) * Xilinx tools (Vivado, Zynq Ultrascale ... Ability to manage: * Technical and schedule risks * Cost reduction opportunities * Program ...

Manage user access, authentication, and external integrations * Define and enforce reporting ... Perform exploratory data analysis (EDA) to identify trends and opportunities * Partner with ...

Manage user access, authentication, and external integrations * Define and enforce reporting ... Perform exploratory data analysis (EDA) to identify trends and opportunities * Partner with ...

Manage user access, authentication, and external integrations * Define and enforce reporting ... Perform exploratory data analysis (EDA) to identify trends and opportunities * Partner with ...

Sr. Director, Factory Automation

Tempe, AZ · On-site

$99K - $130K/yr

... management skills to deliver scalable, cost-effective solutions. Essential Duties and ... Expertise in MES systems, equipment integration (SECS/GEM, EDA), robotics, PLC programming, and ...

Showing results 21-40

Eda Manager information

What is the difference between Eda Manager vs Eda Engineer?

AspectEda ManagerEda Engineer
CredentialsBachelor's or Master's in Electrical Engineering, Project Management certificationsBachelor's or Master's in Electrical Engineering, relevant technical certifications
Work EnvironmentOversees teams, manages projects, coordinates with clientsDesigns and tests electrical systems, performs simulations
Industry UsageUsed in project planning, team leadership, and client communicationUsed in circuit design, simulation, and technical analysis

The main difference between an Eda Manager and an Eda Engineer lies in their roles. The Eda Manager oversees projects and teams, focusing on management and coordination, while the Eda Engineer handles technical design and analysis. Both roles require electrical engineering credentials, but their responsibilities and daily tasks differ significantly.

What are the key skills and qualifications needed to thrive as an EDA manager, and why are they important?

To thrive as an EDA Manager, you need strong expertise in electronic design automation (EDA) methodologies, semiconductor design processes, and a relevant engineering degree. Familiarity with EDA tools such as Cadence, Synopsys, and Mentor Graphics, as well as project management certifications, is often required. Excellent leadership, problem-solving, and communication skills help manage teams and coordinate complex projects. These qualifications ensure efficient workflow, high-quality chip design, and successful project delivery in the fast-paced semiconductor industry.

What are the main challenges an EDA manager faces when overseeing cross-functional design teams?

An EDA Manager often encounters challenges in aligning the goals and timelines of diverse engineering teams, such as digital, analog, and verification groups, who rely on different EDA tools and methodologies. Ensuring smooth integration of workflows, maintaining up-to-date tool expertise, and resolving toolchain compatibility issues are key aspects of the role. Additionally, EDA Managers must balance project deadlines with the need for continuous process improvement, often acting as a bridge between technical teams and upper management to communicate progress and resource needs effectively.

What is an EDA manager?

EDA Managers are professionals who oversee Electronic Design Automation (EDA) projects within semiconductor or electronics companies. Their primary responsibilities include managing teams that use specialized software tools to design, verify, and test integrated circuits (ICs) and other electronic systems. EDA Managers coordinate between engineering, software, and hardware teams to ensure project deadlines are met and quality standards are maintained. They also keep up-to-date with the latest EDA tools and methodologies to enhance productivity and optimize design flows.

What are popular job titles related to Eda Manager jobs in Arizona?

For Eda Manager jobs in Arizona, the most frequently searched job titles are:

What cities in Arizona are hiring for Eda Manager jobs?

Cities in Arizona with the most Eda Manager job openings:

Silicon Packaging Design Engineer

Intel Corporation

Phoenix, AZ • On-site

$135K/yr

Full-time

Medical, Retirement, PTO

Re-posted 18 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 157 rated electronics manufacturers


Job description

Job Details:
Job Description:
Intel seeks a motivated and innovative Silicon Packaging Design Engineer to join our team, driving the end-to-end development of silicon interposer and bridge designs that define the future of computing and connectivity. As a key contributor to Intel's cutting-edge technology, you will play a pivotal role in bridging silicon and hardware design, optimizing package performance, and delivering high-impact solutions that meet performance, cost, and manufacturability goals. Your expertise will directly contribute to Intel's mission to create world-changing technology that improves lives and connects communities worldwide.
Key Responsibilities:
- Design and implement physical layout and routing of silicon interposers and embedded bridges.
- Perform substrate fit and routing studies to evaluate design tradeoffs in performance, cost, and manufacturability.
- Collaborate closely with silicon, technology development and hardware teams to optimize system-level design, including silicon-package-board integration and pinout.
- Propose design updates changes for rules and conduct internal and external reviews to ensure design feasibility.
- Analyze design data and resolve design rule checks (DRCs) to achieve optimized and manufacturable package designs.
- Utilize industry-leading electronic design automation (EDA) tools, including Virtuoso, Innovus, FusionCompiler, ICvalidator, and Calibre, to create robust package layouts.
- Document processes and design specifications in the product lifecycle management system to ensure traceability and efficient collaboration.
- Conduct reviews with partner teams to close milestone requirements
Qualifications:
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- Bachelor's degree with 3+ years of experience OR Master's degree with 2+ years of experience in Electrical Engineering, Computer Engineering, or a STEM related field
Experience listed above should be in the following:
  • Proficiency in custom layout and Auto-place-and-route EDA tools including Virtuoso, Innovus, FusionCompiler, ICvalidator, and/or Calibre.
  • Experience with silicon physical layout design and development, routing interconnects, and/or review tools.

Additionally, the candidate should have at least one of the following:
  • 1+ year of experience with Analog/Mixed Signal fundamentals for signal integrity assessments and I/O fundamentals.
  • 1+ year of experience of Power Distribution and power integrity assessments.
  • 1+ year of experience of reliability requirements for interconnects.

Preferred Qualifications:
  • Familiarity with industry-leading silicon physical design methodologies and workflows.
  • Ability to effectively collaborate across multi-disciplinary teams and communicate technical concepts clearly.
  • A passion for innovation, problem-solving, and continuous improvement in a fast-paced environment.
  • Prior experience in optimizing silicon performance and conducting tradeoff studies for advanced packaging designs.

Join Intel and become an integral part of shaping tomorrow's technology today. Apply now to seize the opportunity to innovate, lead, and create meaningful impact on a global scale
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
US, Oregon, Hillsboro
Business group:
Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-200,340.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

Pay

Benefits

Hours and flexibility

Workplace

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Intel logo

About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968